* [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers
2019-11-27 5:38 [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Daniel Drake
@ 2019-11-27 5:38 ` Daniel Drake
2019-11-27 11:50 ` Mika Westerberg
2019-11-27 11:50 ` [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Mika Westerberg
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Daniel Drake @ 2019-11-27 5:38 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, rafael.j.wysocki, linux, linux-pm, linux-usb, mika.westerberg
On Asus UX434DA (AMD Ryzen7 3700U) and Asus X512DK (AMD Ryzen5 3500U),
the XHCI controller fails to resume from runtime suspend or s2idle,
and USB becomes unusable from that point.
xhci_hcd 0000:03:00.4: Refused to change power state, currently in D3
xhci_hcd 0000:03:00.4: enabling device (0000 -> 0002)
xhci_hcd 0000:03:00.4: WARN: xHC restore state timeout
xhci_hcd 0000:03:00.4: PCI post-resume error -110!
xhci_hcd 0000:03:00.4: HC died; cleaning up
During suspend, a transition to D3cold is attempted, however the affected
platforms do not seem to cut the power to the PCI device when in this
state, so the device stays in D3hot.
Upon resume, the D3hot-to-D0 transition is successful only if the D3 delay
is increased to 20ms. The transition failure does not appear to be
detectable as a CRS condition. Add a PCI quirk to increase the delay on the
affected hardware.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=205587
Link: http://lkml.kernel.org/r/CAD8Lp47Vh69gQjROYG69=waJgL7hs1PwnLonL9+27S_TcRhixA@mail.gmail.com
Signed-off-by: Daniel Drake <drake@endlessm.com>
---
drivers/pci/quirks.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
v2: split out the creation of quirk_d3hot_delay() into its own patch
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 3b4021e719530..222108f1a602e 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1889,6 +1889,22 @@ static void quirk_radeon_pm(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6741, quirk_radeon_pm);
+/*
+ * Ryzen5/7 XHCI controllers fail upon resume from runtime suspend or s2idle.
+ * https://bugzilla.kernel.org/show_bug.cgi?id=205587
+ *
+ * The kernel attempts to transition these devices to D3cold, but that seems
+ * to be ineffective on the platforms in question; the PCI device appears to
+ * remain on in D3hot state. The D3hot-to-D0 transition then requires an
+ * extended delay in order to succeed.
+ */
+static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
+{
+ quirk_d3hot_delay(dev, 20);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
+
#ifdef CONFIG_X86_IO_APIC
static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers
2019-11-27 5:38 ` [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers Daniel Drake
@ 2019-11-27 11:50 ` Mika Westerberg
0 siblings, 0 replies; 6+ messages in thread
From: Mika Westerberg @ 2019-11-27 11:50 UTC (permalink / raw)
To: Daniel Drake
Cc: bhelgaas, linux-pci, rafael.j.wysocki, linux, linux-pm, linux-usb
On Wed, Nov 27, 2019 at 01:38:36PM +0800, Daniel Drake wrote:
> On Asus UX434DA (AMD Ryzen7 3700U) and Asus X512DK (AMD Ryzen5 3500U),
> the XHCI controller fails to resume from runtime suspend or s2idle,
> and USB becomes unusable from that point.
>
> xhci_hcd 0000:03:00.4: Refused to change power state, currently in D3
> xhci_hcd 0000:03:00.4: enabling device (0000 -> 0002)
> xhci_hcd 0000:03:00.4: WARN: xHC restore state timeout
> xhci_hcd 0000:03:00.4: PCI post-resume error -110!
> xhci_hcd 0000:03:00.4: HC died; cleaning up
>
> During suspend, a transition to D3cold is attempted, however the affected
> platforms do not seem to cut the power to the PCI device when in this
> state, so the device stays in D3hot.
>
> Upon resume, the D3hot-to-D0 transition is successful only if the D3 delay
> is increased to 20ms. The transition failure does not appear to be
> detectable as a CRS condition. Add a PCI quirk to increase the delay on the
> affected hardware.
>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=205587
> Link: http://lkml.kernel.org/r/CAD8Lp47Vh69gQjROYG69=waJgL7hs1PwnLonL9+27S_TcRhixA@mail.gmail.com
> Signed-off-by: Daniel Drake <drake@endlessm.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay
2019-11-27 5:38 [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Daniel Drake
2019-11-27 5:38 ` [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers Daniel Drake
@ 2019-11-27 11:50 ` Mika Westerberg
2019-12-12 9:51 ` Daniel Drake
2019-12-13 21:04 ` Bjorn Helgaas
3 siblings, 0 replies; 6+ messages in thread
From: Mika Westerberg @ 2019-11-27 11:50 UTC (permalink / raw)
To: Daniel Drake
Cc: bhelgaas, linux-pci, rafael.j.wysocki, linux, linux-pm, linux-usb
On Wed, Nov 27, 2019 at 01:38:35PM +0800, Daniel Drake wrote:
> Separate the D3 delay increase functionality out of quirk_radeon_pm() into
> its own function so that it can be shared with other quirks, including
> the AMD Ryzen XHCI quirk that will be introduced in a followup commit.
>
> Tweak the function name and message to indicate more clearly that the
> delay relates to a D3hot-to-D0 transition.
>
> Signed-off-by: Daniel Drake <drake@endlessm.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay
2019-11-27 5:38 [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Daniel Drake
2019-11-27 5:38 ` [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers Daniel Drake
2019-11-27 11:50 ` [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Mika Westerberg
@ 2019-12-12 9:51 ` Daniel Drake
2019-12-13 21:04 ` Bjorn Helgaas
3 siblings, 0 replies; 6+ messages in thread
From: Daniel Drake @ 2019-12-12 9:51 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Linux PCI, Wysocki, Rafael J, Linux Upstreaming Team, Linux PM,
Linux USB Mailing List, Mika Westerberg
Hi Bjorn,
On Wed, Nov 27, 2019 at 1:38 PM Daniel Drake <drake@endlessm.com> wrote:
> Separate the D3 delay increase functionality out of quirk_radeon_pm() into
> its own function so that it can be shared with other quirks, including
> the AMD Ryzen XHCI quirk that will be introduced in a followup commit.
>
> Tweak the function name and message to indicate more clearly that the
> delay relates to a D3hot-to-D0 transition.
Any update on these pending patches?
Thanks
Daniel
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay
2019-11-27 5:38 [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Daniel Drake
` (2 preceding siblings ...)
2019-12-12 9:51 ` Daniel Drake
@ 2019-12-13 21:04 ` Bjorn Helgaas
3 siblings, 0 replies; 6+ messages in thread
From: Bjorn Helgaas @ 2019-12-13 21:04 UTC (permalink / raw)
To: Daniel Drake
Cc: linux-pci, rafael.j.wysocki, linux, linux-pm, linux-usb, mika.westerberg
On Wed, Nov 27, 2019 at 01:38:35PM +0800, Daniel Drake wrote:
> Separate the D3 delay increase functionality out of quirk_radeon_pm() into
> its own function so that it can be shared with other quirks, including
> the AMD Ryzen XHCI quirk that will be introduced in a followup commit.
>
> Tweak the function name and message to indicate more clearly that the
> delay relates to a D3hot-to-D0 transition.
>
> Signed-off-by: Daniel Drake <drake@endlessm.com>
I applied both of these to pci/misc for v5.6, thanks!
> ---
> drivers/pci/quirks.c | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> v2: tweaked function name and message to emphasize D3hot state
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 320255e5e8f89..3b4021e719530 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -1871,16 +1871,21 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2609, quirk_intel_pcie_pm);
> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm);
> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm);
>
> +static void quirk_d3hot_delay(struct pci_dev *dev, unsigned int delay)
> +{
> + if (dev->d3_delay >= delay)
> + return;
> +
> + dev->d3_delay = delay;
> + pci_info(dev, "extending delay after power-on from D3hot to %d msec\n",
> + dev->d3_delay);
> +}
> +
> static void quirk_radeon_pm(struct pci_dev *dev)
> {
> if (dev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
> - dev->subsystem_device == 0x00e2) {
> - if (dev->d3_delay < 20) {
> - dev->d3_delay = 20;
> - pci_info(dev, "extending delay after power-on from D3 to %d msec\n",
> - dev->d3_delay);
> - }
> - }
> + dev->subsystem_device == 0x00e2)
> + quirk_d3hot_delay(dev, 20);
> }
> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6741, quirk_radeon_pm);
>
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread