From: Neil Armstrong <narmstrong@baylibre.com>
To: kishon@ti.com, balbi@kernel.org, khilman@baylibre.com,
martin.blumenstingl@googlemail.com
Cc: Neil Armstrong <narmstrong@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-usb@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 09/14] usb: dwc3: meson-g12a: add support for GXL and GXM SoCs
Date: Thu, 26 Mar 2020 14:45:01 +0100 [thread overview]
Message-ID: <20200326134507.4808-10-narmstrong@baylibre.com> (raw)
In-Reply-To: <20200326134507.4808-1-narmstrong@baylibre.com>
In order to add support for the Amlogic GXL/GXM USB Glue, this adds
the corresponding :
- PHY names
- clock names
- USB2 PHY init and mode set
- regmap setup
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/usb/dwc3/dwc3-meson-g12a.c | 102 ++++++++++++++++++++++++++++-
1 file changed, 101 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index f3f247d38606..15b8d9d4accd 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -101,6 +101,11 @@
#define PHY_COUNT 3
#define USB2_OTG_PHY 1
+static struct clk_bulk_data meson_gxl_clocks[] = {
+ { .id = "usb_ctrl" },
+ { .id = "ddr" },
+};
+
static struct clk_bulk_data meson_g12a_clocks[] = {
{ .id = NULL },
};
@@ -111,6 +116,10 @@ static struct clk_bulk_data meson_a1_clocks[] = {
{ .id = "xtal_usb_ctrl" },
};
+static const char *meson_gxm_phy_names[] = {
+ "usb2-phy0", "usb2-phy1", "usb2-phy2",
+};
+
static const char *meson_g12a_phy_names[] = {
"usb2-phy0", "usb2-phy1", "usb3-phy0",
};
@@ -145,16 +154,53 @@ struct dwc3_meson_g12a_drvdata {
int (*usb_post_init)(struct dwc3_meson_g12a *priv);
};
+static int dwc3_meson_gxl_setup_regmaps(struct dwc3_meson_g12a *priv,
+ void __iomem *base);
static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv,
void __iomem *base);
static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
- enum phy_mode mode);
+ enum phy_mode mode);
+static int dwc3_meson_gxl_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
+ enum phy_mode mode);
static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv,
int i, enum phy_mode mode);
+static int dwc3_meson_gxl_set_phy_mode(struct dwc3_meson_g12a *priv,
+ int i, enum phy_mode mode);
static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv);
+static int dwc3_meson_gxl_usb_init(struct dwc3_meson_g12a *priv);
+
+static int dwc3_meson_gxl_usb_post_init(struct dwc3_meson_g12a *priv);
+
+static struct dwc3_meson_g12a_drvdata gxl_drvdata = {
+ .otg_switch_supported = true,
+ .otg_phy_host_port_disable = true,
+ .clks = meson_gxl_clocks,
+ .num_clks = ARRAY_SIZE(meson_g12a_clocks),
+ .phy_names = meson_a1_phy_names,
+ .num_phys = ARRAY_SIZE(meson_a1_phy_names),
+ .setup_regmaps = dwc3_meson_gxl_setup_regmaps,
+ .usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
+ .set_phy_mode = dwc3_meson_gxl_set_phy_mode,
+ .usb_init = dwc3_meson_gxl_usb_init,
+ .usb_post_init = dwc3_meson_gxl_usb_post_init,
+};
+
+static struct dwc3_meson_g12a_drvdata gxm_drvdata = {
+ .otg_switch_supported = true,
+ .otg_phy_host_port_disable = true,
+ .clks = meson_gxl_clocks,
+ .num_clks = ARRAY_SIZE(meson_g12a_clocks),
+ .phy_names = meson_gxm_phy_names,
+ .num_phys = ARRAY_SIZE(meson_gxm_phy_names),
+ .setup_regmaps = dwc3_meson_gxl_setup_regmaps,
+ .usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
+ .set_phy_mode = dwc3_meson_gxl_set_phy_mode,
+ .usb_init = dwc3_meson_gxl_usb_init,
+ .usb_post_init = dwc3_meson_gxl_usb_post_init,
+};
/*
* For GXL and GXM SoCs:
@@ -209,6 +255,21 @@ struct dwc3_meson_g12a {
const struct dwc3_meson_g12a_drvdata *drvdata;
};
+static int dwc3_meson_gxl_set_phy_mode(struct dwc3_meson_g12a *priv,
+ int i, enum phy_mode mode)
+{
+ return phy_set_mode(priv->phys[i], mode);
+}
+
+static int dwc3_meson_gxl_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
+ enum phy_mode mode)
+{
+ /* On GXL PHY must be started in device mode for DWC2 init */
+ return priv->drvdata->set_phy_mode(priv, i,
+ (i == USB2_OTG_PHY) ? PHY_MODE_USB_DEVICE
+ : PHY_MODE_USB_HOST);
+}
+
static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv,
int i, enum phy_mode mode)
{
@@ -556,6 +617,18 @@ static int dwc3_meson_g12a_otg_init(struct platform_device *pdev,
return 0;
}
+static int dwc3_meson_gxl_setup_regmaps(struct dwc3_meson_g12a *priv,
+ void __iomem *base)
+{
+ /* GXL controls the PHY mode in the PHY registers unlike G12A */
+ priv->usb_glue_regmap = devm_regmap_init_mmio(priv->dev, base,
+ &phy_meson_g12a_usb_glue_regmap_conf);
+ if (IS_ERR(priv->usb_glue_regmap))
+ return PTR_ERR(priv->usb_glue_regmap);
+
+ return 0;
+}
+
static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv,
void __iomem *base)
{
@@ -596,6 +669,25 @@ static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv)
return dwc3_meson_g12a_usb_init_glue(priv, priv->otg_phy_mode);
}
+static int dwc3_meson_gxl_usb_init(struct dwc3_meson_g12a *priv)
+{
+ return dwc3_meson_g12a_usb_init_glue(priv, PHY_MODE_USB_DEVICE);
+}
+
+static int dwc3_meson_gxl_usb_post_init(struct dwc3_meson_g12a *priv)
+{
+ int ret;
+
+ ret = priv->drvdata->set_phy_mode(priv, USB2_OTG_PHY,
+ priv->otg_phy_mode);
+ if (ret)
+ return ret;
+
+ dwc3_meson_g12a_usb_otg_apply_mode(priv, priv->otg_phy_mode);
+
+ return 0;
+}
+
static int dwc3_meson_g12a_probe(struct platform_device *pdev)
{
struct dwc3_meson_g12a *priv;
@@ -825,6 +917,14 @@ static const struct dev_pm_ops dwc3_meson_g12a_dev_pm_ops = {
};
static const struct of_device_id dwc3_meson_g12a_match[] = {
+ {
+ .compatible = "amlogic,meson-gxl-usb-ctrl",
+ .data = &gxl_drvdata,
+ },
+ {
+ .compatible = "amlogic,meson-gxm-usb-ctrl",
+ .data = &gxm_drvdata,
+ },
{
.compatible = "amlogic,meson-g12a-usb-ctrl",
.data = &g12a_drvdata,
--
2.22.0
next prev parent reply other threads:[~2020-03-26 13:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 13:44 [PATCH v2 00/14] usb: dwc3: meson: add OTG support for GXL/GXM Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 01/14] dt-bindings: usb: amlogic,meson-g12a-usb-ctrl: add the Amlogic GXL and GXM Families USB Glue Bindings Neil Armstrong
2020-04-04 17:20 ` Rob Herring
2020-03-26 13:44 ` [PATCH v2 02/14] usb: dwc3: meson-g12a: specify phy names in soc data Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 03/14] usb: dwc3: meson-g12a: handle the phy and glue registers separately Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 04/14] usb: dwc3: meson-g12a: get the reset as shared Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 05/14] usb: dwc3: meson-g12a: check return of dwc3_meson_g12a_usb_init Neil Armstrong
2020-03-26 22:57 ` Martin Blumenstingl
2020-03-26 13:44 ` [PATCH v2 06/14] usb: dwc3: meson-g12a: refactor usb2 phy init Neil Armstrong
2020-03-26 23:08 ` Martin Blumenstingl
2020-03-29 10:35 ` Felipe Balbi
2020-03-26 13:44 ` [PATCH v2 07/14] usb: dwc3: meson-g12a: refactor usb init Neil Armstrong
2020-03-26 23:26 ` Martin Blumenstingl
2020-03-31 8:44 ` Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 08/14] usb: dwc3: meson-g12a: support the GXL/GXM DWC3 host phy disconnect Neil Armstrong
2020-03-26 13:45 ` Neil Armstrong [this message]
2020-03-26 13:45 ` [PATCH v2 10/14] arm64: dts: amlogic: use the new USB control driver for GXL and GXM Neil Armstrong
2020-04-29 18:17 ` Kevin Hilman
2020-03-26 13:45 ` [PATCH v2 11/14] phy: amlogic: meson-gxl-usb3: remove code for non-existing PHY Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 12/14] usb: dwc3: of-simple: remove Amlogic GXL and AXG compatibles Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 13/14] doc: dt: bindings: usb: dwc3: remove amlogic compatible entries Neil Armstrong
2020-04-04 17:21 ` Rob Herring
2020-03-26 13:45 ` [PATCH v2 14/14] dt-bindings: usb: dwc3: remove old DWC3 wrapper Neil Armstrong
2020-04-04 17:21 ` Rob Herring
2020-03-29 10:36 ` [PATCH v2 00/14] usb: dwc3: meson: add OTG support for GXL/GXM Felipe Balbi
2020-03-31 8:40 ` Neil Armstrong
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