Re: using cdns3-imx driver on imx8qm

From: Peter Chen <peter.chen@nxp.com>
To: Oliver Graute <Oliver.Graute@KoCoConnector.com>
Cc: "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	Felipe Balbi <balbi@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	"oliver.graute@gmail.com" <oliver.graute@gmail.com>,
	dl-linux-imx <linux-imx@nxp.com>
Subject: Re: using cdns3-imx driver on imx8qm
Date: Thu, 2 Apr 2020 01:16:47 +0000	[thread overview]
Message-ID: <20200402011710.GA6295@b29397-desktop> (raw)
In-Reply-To: <20200401103434.GA38169@archlinux.localdomain>

On 20-04-01 12:34:34, Oliver Graute wrote:
> > Make sure the five clocks in dts are correct, and print the USB3_SSPHY_STATUS if
> > timeout still exists.
> 
> ok I got this for USB3_SSPHY_STATUS
> 
> [    3.057122] cdns3-imx 5b110000.usb3: wait clkvld timeout 0xb0b03827
> 

It indicates usb3_aclk did not open correctly. Tried to see if u-boot
could work well, and see if set its assigned-clock-rates as 500000000
could work.

Peter

> Unfortunally my imx8qm spec is incomplete regarding the USB3_SSPHY_STATUS register.
> 
> this are my related DTS nodes:
> 
> 	usb3_lpcg: clock-controller@5b280000 {
> 		compatible = "fsl,imx8qxp-lpcg";
> 		reg = <0x5b280000 0x10000>;
> 		#clock-cells = <1>;
> 		/* bit-offset = <0 4 16 20 24 28>; */
> 		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>,
> 				<IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>,
> 				<IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>;
> 		clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>,
> 			 <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
> 			 <&conn_ipg_clk>,
> 			 <&conn_ipg_clk>,
> 			 <&conn_ipg_clk>,
> 			 <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
> 		clock-output-names = "usb3_app_clk",
> 				     "usb3_lpm_clk",
> 				     "usb3_ipg_clk",
> 				     "usb3_core_pclk",
> 				     "usb3_phy_clk",
> 				     "usb3_aclk";
> 		power-domains = <&pd IMX_SC_R_USB_2_PHY>;
> 	};
> 
> 	usbotg3: usb3@5b110000 {
> 		compatible = "fsl,imx8qm-usb3";
> 		#address-cells = <1>;
> 		#size-cells = <1>;
> 		/* ranges; */
> 		reg = <0x0 0x5B110000 0x0 0x10000>;
> 		clocks = <&usb3_lpcg 1>,
> 			 <&usb3_lpcg 0>,
> 			 <&usb3_lpcg 5>,
> 			 <&usb3_lpcg 2>,
> 			 <&usb3_lpcg 3>;
> 		clock-names = "usb3_lpm_clk", "usb3_bus_clk", "usb3_aclk",
> 			"usb3_ipg_clk", "usb3_core_pclk";
> 		assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>,
> 			<&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
> 			<&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
> 		assigned-clock-rates = <125000000>, <12000000>, <250000000>;
> 		power-domains = <&pd IMX_SC_R_USB_2>;
> 		status = "disabled";
> 
> 		usbotg3_cdns3: cdns3 {
> 			compatible = "cdns,usb3";
> 			#address-cells = <1>;
> 			#size-cells = <1>;
> 			interrupt-parent = <&gic>;
> 			interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
> 					<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
> 					<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>;
> 			interrupt-names = "host", "peripheral", "otg";
> 			reg = <0x5B130000 0x10000>,     /* memory area for HOST registers */
> 				<0x5B140000 0x10000>,   /* memory area for DEVICE registers */
> 				<0x5B120000 0x10000>;   /* memory area for OTG/DRD registers */
> 			reg-names = "xhci", "dev", "otg";
> 			phys = <&usbphynop2>;
> 			phy-names = "cdns3,usb2-phy";
> 			status = "disabled";
> 		};
> 	};
> 
> I'am also using the SCU related clock patches from here: 
> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fpatch%2F11248255%2F&amp;data=02%7C01%7Cpeter.chen%40nxp.com%7Ce6d163e72ed14b064f4208d7d629842f%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637213346107862080&amp;sdata=ChqqxYqxdJysskHzHP1dmF69zGVzw4PfDz%2Fim%2F0khHc%3D&amp;reserved=0
> 
> Thx for your comments,
> 
> Best regards,
> 
> Oliver

-- 

Thanks,
Peter Chen