From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A824EC433FE for ; Mon, 8 Nov 2021 17:10:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 86A9561130 for ; Mon, 8 Nov 2021 17:10:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239605AbhKHRMw (ORCPT ); Mon, 8 Nov 2021 12:12:52 -0500 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:43653 "EHLO out1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232922AbhKHRMv (ORCPT ); Mon, 8 Nov 2021 12:12:51 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id CACBA5C01B0; Mon, 8 Nov 2021 12:09:58 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 08 Nov 2021 12:09:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; s=fm2; bh=Ac01M78HVVhymN796EnmiJqYFD Y+9Lkga4k+OMsqtcI=; b=QQVqrjxJksTewDwfJheHFr7xtjwamMCBS0l65m8gsB 2lGzelknadwD0QORItBLsASN5QEeOThV7YPupyo5nZ5Q+AFL0jVwwpE7XkJKNu+w fG5LvdZdg7SsgRhx3aadMMmvKfp8YmqD4s2IEmDb2VMXi9AeM4Mi0ML3SJJ7SkYX QXVO3gmb4Zr5xWxZxRKITVKQbWYwgdLJzH3HNm5qrvPZynD+X5G1eqj1VGlAznEu R7ypo2EGed15YoHtgUpT10r+hyqpcBZWiBBDJQGSb+9IChotof00tgCmhSEkP2zo AowVQzQO7mcZ+JUCnDsN/ZV2YD4hhK4aoPDrCxsKpdlA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :message-id:mime-version:subject:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=Ac01M78HVVhymN796 EnmiJqYFDY+9Lkga4k+OMsqtcI=; b=kSZa2Z/rrFyJenUy9r41JyLPg8DsnpP4J P/+MLjt05xA76fAFLIjhp+wIPwFtywFGHioqvuKov5vYN6a32hN0TA/v5i/n5RmW KCbJ8/b3nQDneJYmdzIEFFZHERgZzF7MKhUh4/PL2I/F+uq05GuQ6/ut/+H8fUFn lJVxxRFr7DXouF10jOR64XyDfBGVYsAuZVvAfr/HiVDJ/iSJTicCC4rqqy+TK0G9 XWLICHx7OK9ITcmv+cS6rlLWFvXYRWUeaQuhJ7angc2JVschOO9gsEGgWUO3p3/4 +uQhyf1LY6pCYNM0IMjm8GNrxFm96rxNN3naPH8YJ2OBqEfXeAH/A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvuddruddvgdeliecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkofgggfestdekredtredttdenucfhrhhomhepufhvvghnucfrvght vghruceoshhvvghnsehsvhgvnhhpvghtvghrrdguvghvqeenucggtffrrghtthgvrhhnpe efjefgjeelveelledtiefhteetfeevudejledvieelvdejffeujeejtefgkedvudenucff ohhmrghinhepuggvvhhitggvthhrvggvrdhorhhgpdhgihhthhhusgdrtghomhenucevlh hushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehsvhgvnhesshhv vghnphgvthgvrhdruggvvh X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 8 Nov 2021 12:09:56 -0500 (EST) From: Sven Peter To: Rob Herring Cc: Sven Peter , Felipe Balbi , Greg Kroah-Hartman , Hector Martin , Alyssa Rosenzweig , Mark Kettenis , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: usb: Add Apple dwc3 bindings Date: Mon, 8 Nov 2021 18:09:45 +0100 Message-Id: <20211108170946.49689-1-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Apple Silicon SoCs such as the M1 have multiple USB controllers based on the Synopsys DesignWare USB3 controller. References to the ATC PHY required for SuperSpeed are left out for now until support has been upstreamed as well. Signed-off-by: Sven Peter --- v1 -> v2: - added apple,dwc3 bindings instead of a property for the reset quirk as requested by robh I think I have to use GPL-2.0 for this binding since it's based on and references snps,dwc3.yaml which is also only GPL-2.0. Otherwise I'd be fine with the usual GPL/BSD dual license as well. .../devicetree/bindings/usb/apple,dwc3.yaml | 64 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/apple,dwc3.yaml diff --git a/Documentation/devicetree/bindings/usb/apple,dwc3.yaml b/Documentation/devicetree/bindings/usb/apple,dwc3.yaml new file mode 100644 index 000000000000..fb3b3489e6b2 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/apple,dwc3.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/apple,dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple Silicon DWC3 USB controller + +maintainers: + - Sven Peter + +description: + On Apple Silicon SoCs such as the M1 each Type-C port has a corresponding + USB controller based on the Synopsys DesignWare USB3 controller. + + The common content of this binding is defined in snps,dwc3.yaml. + +allOf: + - $ref: snps,dwc3.yaml# + +select: + properties: + compatible: + contains: + const: apple,dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - apple,t8103-dwc3 + - apple,t6000-dwc3 + - const: apple,dwc3 + - const: snps,dwc3 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include + #include + + usb@82280000 { + compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3"; + reg = <0x82280000 0x10000>; + interrupts = ; + + dr_mode = "otg"; + usb-role-switch; + role-switch-default-mode = "host"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 3b79fd441dde..03e7cc48877a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1724,6 +1724,7 @@ T: git https://github.com/AsahiLinux/linux.git F: Documentation/devicetree/bindings/arm/apple.yaml F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +F: Documentation/devicetree/bindings/usb/apple,dwc3.yaml F: arch/arm64/boot/dts/apple/ F: drivers/irqchip/irq-apple-aic.c F: include/dt-bindings/interrupt-controller/apple-aic.h -- 2.25.1