From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B194C433E7 for ; Tue, 13 Oct 2020 12:43:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B236722483 for ; Tue, 13 Oct 2020 12:43:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="F7MlkGaD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727927AbgJMMng (ORCPT ); Tue, 13 Oct 2020 08:43:36 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:46148 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727077AbgJMMng (ORCPT ); Tue, 13 Oct 2020 08:43:36 -0400 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 3F039C0347; Tue, 13 Oct 2020 12:43:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1602593015; bh=4Udne1lH1gThm+TGjds0gt6XwZADS/jIPmac14sXZlY=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=F7MlkGaDHurSHOSLQknp8mvuJOy+Apbm2no+m004eCcmV92KXdRCJe3p4kJVMqlUy SUr9MKIyvwt28OI7pbZiBcMSWwxaiYkcYKjCEzcq+G/RZjdfDM4SLUVOmfApD41sgw mbdJRcZez78Okt5Xbi/3/qQo0BZ+sJ1fB2d3HvBYIPF+hJwVokz7BumViXciEJ4sCX cZqihPUhpqhlDRw5MVkuaDflrjzrEC35458TTbTE1FNcQtPBOdFfZN1BD0tAGaFJt+ HYyv5949UfwDcRm+ytxNBolOdm1H+Sq1fxi41LV7QfHqnPquNrMOjGOsc2+mVe76n2 cbRjzVb1R/7Tg== Received: from tejas-VirtualBox (joglekar-e7480.internal.synopsys.com [10.146.18.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id AC66BA005E; Tue, 13 Oct 2020 12:43:31 +0000 (UTC) Received: by tejas-VirtualBox (sSMTP sendmail emulation); Tue, 13 Oct 2020 18:13:29 +0530 Date: Tue, 13 Oct 2020 18:13:29 +0530 Message-Id: <42caec038cda7cbf358404b86fb5b683f929e2c1.1602592488.git.joglekar@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Tejas Joglekar Subject: [PATCH v4 1/3] usb: xhci: Set quirk for XHCI_SG_TRB_CACHE_SIZE_QUIRK To: Greg Kroah-Hartman , Tejas Joglekar , linux-usb@vger.kernel.org, Mathias Nyman Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This commit uses the private data passed by parent device to set the quirk for Synopsys xHC. This patch fixes the SNPS xHC hang issue when the data is scattered across small buffers which does not make atleast MPS size for given TRB cache size of SNPS xHC. Signed-off-by: Tejas Joglekar --- drivers/usb/host/xhci-plat.c | 3 +++ drivers/usb/host/xhci.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index aa2d35f98200..4d34f6005381 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -333,6 +333,9 @@ static int xhci_plat_probe(struct platform_device *pdev) if (priv && (priv->quirks & XHCI_SKIP_PHY_INIT)) hcd->skip_phy_initialization = 1; + if (priv && (priv->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK)) + xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK; + ret = usb_add_hcd(hcd, irq, IRQF_SHARED); if (ret) goto disable_usb_phy; diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 8be88379c0fb..f8e453a2674d 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1877,6 +1877,7 @@ struct xhci_hcd { #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) #define XHCI_RENESAS_FW_QUIRK BIT_ULL(36) #define XHCI_SKIP_PHY_INIT BIT_ULL(37) +#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(38) unsigned int num_active_eps; unsigned int limit_active_eps; -- 2.28.0