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From: Stefan Wahren <stefan.wahren@i2se.com>
To: Pavel Hofman <pavel.hofman@ivitera.com>,
	Minas Harutyunyan <hminas@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
	linux-rpi-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: bcm283x: increase dwc2's RX FIFO size
Date: Wed, 26 May 2021 19:12:09 +0200	[thread overview]
Message-ID: <44d8f7e0-b2d0-8547-7367-7a35af68efe6@i2se.com> (raw)
In-Reply-To: <e9e7d070-593c-122f-3a5c-2435bb147ab2@ivitera.com>

Hi Pavel,

Am 13.11.20 um 08:18 schrieb Pavel Hofman:
> The previous version of the dwc2 overlay set the RX FIFO size to
> 256 4-byte words. This is not enough for 1024 bytes of the largest
> isochronous high speed packet allowed, because it doesn't take into
> account extra space needed by dwc2.
>
> RX FIFO's size is calculated based on the following (in 4byte words):
> - 13 locations for SETUP packets
>   5*n + 8 for Slave and Buffer DMA mode where n is number of control
>   endpoints which is 1 on the bcm283x core
>
> - 1 location for Global OUT NAK
>
> - 2 * 257 locations for status information and the received packet.
>   Typically two spaces are recommended so that when the previous packet
>   is being transferred to AHB, the USB can receive the subsequent
>   packet.
>
> - 10 * 1 location for transfer complete status for last packet of each
>   endpoint. The bcm283x core has 5 IN and 5 OUT EPs
>
> - 10 * 1 additional location for EPDisable status for each endpoint
>
> - 5 * 2 additional locations are recommended for each OUT endpoint
>
> Total is 558 locations.
>
> Signed-off-by: Phil Elwell <phil@raspberrypi.com>
> Signed-off-by: Pavel Hofman <pavel.hofman@ivitera.com>
> ---
>  arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi        | 2 +-
>  arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi
> b/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi
> index e2fd961..20322de 100644
> --- a/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi
> +++ b/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi
> @@ -1,7 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  &usb {
>  	dr_mode = "otg";
> -	g-rx-fifo-size = <256>;
> +	g-rx-fifo-size = <558>;
>  	g-np-tx-fifo-size = <32>;
>  	/*
>  	 * According to dwc2 the sum of all device EP
> diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
> b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
> index 0ff0e9e..1409d1b 100644
> --- a/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
> +++ b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
> @@ -1,7 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  &usb {
>  	dr_mode = "peripheral";
> -	g-rx-fifo-size = <256>;
> +	g-rx-fifo-size = <558>;

sorry for being late at the party, but this change introduce a
regression on Raspberry Pi 4 B:

dwc2 fe980000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter
g-tx-fifo-size, setting to default average

I known you didn't change the tx fifo size, but there are complex
constrains regarding the total fifo size.

Are you able to test this with a mainline kernel (not Raspberry Pi
kernel) and send a fix for this?

>  	g-np-tx-fifo-size = <32>;
>  	g-tx-fifo-size = <256 256 512 512 512 768 768>;
>  };


  parent reply	other threads:[~2021-05-26 17:12 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-13  7:18 [PATCH] ARM: dts: bcm283x: increase dwc2's RX FIFO size Pavel Hofman
2020-11-20 16:44 ` Nicolas Saenz Julienne
2021-05-26 17:12 ` Stefan Wahren [this message]
2021-05-27 13:17   ` Pavel Hofman
2021-05-27 13:47     ` Stefan Wahren
2021-05-28  8:59       ` Pavel Hofman
2021-08-06 13:03         ` Pavel Hofman
2021-08-06 14:08           ` Stefan Wahren
2021-08-06 14:46             ` Pavel Hofman
2021-08-06 15:57               ` Stefan Wahren
  -- strict thread matches above, loose matches on Subject: below --
2020-02-07 21:12 Pavel Hofman
2020-02-12 18:57 ` Nicolas Saenz Julienne

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