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[46.138.85.91]) by smtp.googlemail.com with ESMTPSA id 27sm353157lfz.146.2021.08.17.19.07.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 17 Aug 2021 19:07:20 -0700 (PDT) Subject: Re: [PATCH v8 09/34] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D From: Dmitry Osipenko To: Rob Herring Cc: Thierry Reding , Jonathan Hunter , Ulf Hansson , Viresh Kumar , Stephen Boyd , Peter De Schrijver , Mikko Perttunen , Peter Chen , Mark Brown , Lee Jones , =?UTF-8?Q?Uwe_Kleine-K=c3=b6nig?= , Nishanth Menon , Vignesh Raghavendra , Richard Weinberger , Miquel Raynal , Lucas Stach , Stefan Agner , Adrian Hunter , Mauro Carvalho Chehab , Michael Turquette , linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-staging@lists.linux.dev, linux-spi@vger.kernel.org, linux-pwm@vger.kernel.org, linux-mtd@lists.infradead.org, linux-mmc@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org References: <20210817012754.8710-1-digetx@gmail.com> <20210817012754.8710-10-digetx@gmail.com> <9deced25-b184-7b5b-cebf-0ad82bd959db@gmail.com> Message-ID: <7f35b432-d113-99fa-88ca-20601ccf7e04@gmail.com> Date: Wed, 18 Aug 2021 05:07:19 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <9deced25-b184-7b5b-cebf-0ad82bd959db@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org 18.08.2021 05:04, Dmitry Osipenko пишет: > 18.08.2021 04:37, Dmitry Osipenko пишет: >> 18.08.2021 04:16, Rob Herring пишет: >>> On Tue, Aug 17, 2021 at 04:27:29AM +0300, Dmitry Osipenko wrote: >>>> Memory Client should be blocked before hardware reset is asserted in order >>>> to prevent memory corruption and hanging of memory controller. >>>> >>>> Document Memory Client resets of Host1x, GR2D and GR3D hardware units. >>>> >>>> Signed-off-by: Dmitry Osipenko >>>> --- >>>> .../bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++++ >>>> 1 file changed, 4 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt >>>> index 62861a8fb5c6..07a08653798b 100644 >>>> --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt >>>> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt >>>> @@ -18,6 +18,7 @@ Required properties: >>>> - resets: Must contain an entry for each entry in reset-names. >>>> See ../reset/reset.txt for details. >>>> - reset-names: Must include the following entries: >>>> + - mc >>>> - host1x >>> >>> New entries should be at the end. Order matters. >> >> Indeed, order matters. In this case it matters by the hardware because >> memory reset must be asserted before the controller's reset. We rely on >> it in the code of the GENPD driver. Hence it's the intended order in >> this patch. >> > > Although, my bad. It should be to reorder items here, it's not a GENPD > binding. > * should be fine I'll change it in v9.