From: Linyu Yuan <quic_linyyuan@quicinc.com>
To: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Cc: 정재훈 <jh0801.jung@samsung.com>,
"'Felipe Balbi'" <balbi@kernel.org>,
"'Greg Kroah-Hartman'" <gregkh@linuxfoundation.org>,
"'open list:USB XHCI DRIVER'" <linux-usb@vger.kernel.org>,
"'open list'" <linux-kernel@vger.kernel.org>,
"'Seungchull Suh'" <sc.suh@samsung.com>,
"'Daehwan Jung'" <dh10.jung@samsung.com>
Subject: Re: [PATCH] usb: dwc3: Clear DWC3_EVENT_PENDING when count is 0
Date: Wed, 11 Jan 2023 09:45:54 +0800 [thread overview]
Message-ID: <826538ae-d27a-fc03-c8dc-94b53c8a44cf@quicinc.com> (raw)
In-Reply-To: <20230111000021.r2bd5gnfwlbxzxd3@synopsys.com>
On 1/11/2023 8:00 AM, Thinh Nguyen wrote:
>
>> one more question, is it legacy PCIe device still exist in real world ? and
>> any VID/PID info ?
> Currently, all dwc3 PCIe devices are affected. Some setups are more
if non PCIe device have no such issue, can we do some improvement for it ?
like new flag or static key/jump label to improve interrupt handler ?
> noticeable than others. The dwc3 driver is implemented to probe platform
> devices. So, dwc3 PCIe devices are wrapped as platform devices for the
> dwc3 driver. Since we're going through the platform device code path,
> the pci layer falls back to using legacy interrupt instead of MSI (last
> I check awhile ago).
>
> A little more detail on this problem:
> PCIe legacy interrupt will emulate interrupt line by sending an
> interrupt assert and deassert messages. After the interrupt assert
> message is sent, interrupts are continuously generated until the
> deassert message is sent. If there's a register write to unmask/mask
> interrupt or clearing events falls in between these messages, then there
> may be a race.
>
> Let's say we don't have event pending check, this can happen:
>
> Normal scenario
> ---------------
> event_count += n # controller generates new events
> interrupt asserts
> write(mask irq)
> event_count -= n # dwc3 clears events
> interrupt deasserts
> write(unmask irq)
>
>
> Race scenario
> -------------
> event_count += n # new events
> interrupt asserts
> write(mask irq)
> event_count -= n # clear events
> event_count += n # more events come and hard irq handler gets called
> # again as interrupt is generated, but cached
> # events haven't been handled. This breaks
> # serialization and causes lost events.
> write(mask irq)
>
> event_count -= n # clear events
> interrupt deasserts
> write(unmask irq) # events handled
if mask irq is not working, the race will happen like this, thanks for
explanation.
>
> For MSI, this won't be a problem because it's edge-triggered and the way
> it sends interrupt is different.
>
> BR,
> Thinh
next prev parent reply other threads:[~2023-01-11 1:46 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20230102050839epcas2p4b9d09d926f9a14c3b8e8df2574d334c3@epcas2p4.samsung.com>
2023-01-02 5:08 ` [PATCH] usb: dwc3: Clear DWC3_EVENT_PENDING when count is 0 JaeHun Jung
2023-01-03 15:48 ` Felipe Balbi
2023-01-05 3:29 ` Linyu Yuan
2023-01-05 3:35 ` Linyu Yuan
2023-01-05 9:54 ` 정재훈
2023-01-06 3:13 ` Linyu Yuan
2023-01-09 18:28 ` Thinh Nguyen
2023-01-10 1:56 ` Linyu Yuan
2023-01-10 2:53 ` Thinh Nguyen
2023-01-10 3:05 ` Linyu Yuan
2023-01-10 3:13 ` Linyu Yuan
2023-01-10 7:38 ` Linyu Yuan
2023-01-11 0:00 ` Thinh Nguyen
2023-01-11 1:45 ` Linyu Yuan [this message]
2023-01-11 2:27 ` Thinh Nguyen
2023-01-31 6:38 ` Linyu Yuan
2023-02-01 18:57 ` Thinh Nguyen
2023-02-02 5:00 ` Linyu Yuan
2023-02-02 20:06 ` Thinh Nguyen
2023-02-03 2:18 ` Linyu Yuan
2023-01-09 18:35 ` Thinh Nguyen
2023-01-09 19:09 ` Thinh Nguyen
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