Hi,

David Laight <David.Laight@ACULAB.COM> writes:
> From: Mathias Nyman
>> Sent: 25 September 2019 15:48
>> 
>> On 24.9.2019 17.45, alex zheng wrote:
>> > Hi Mathias,
> ...
>> Logs show your transfer ring has four segments, but hardware fails to
>> jump from the last segment back to first)
>> 
>> Last TRB (LINK TRB) of each segment points to the next segment,
>> last segments link trb points back to first segment.
>> 
>> In your case:
>> 0x1d117000 -> 0x1eb09000 -> 0x1eb0a000 -> 0x1dbda000 -> (back to 0x1d117000)
>> 
>> For some reason your hardware doesn't treat the last TRB at the last segment
>> as a LINK TRB, instead it just issues a transfer event for it, and continues to
>> the next address instead of jumping back to first segment:
>
> That could be a cache coherency (or flushing (etc)) issue.

XHCI has a HW-configurable maximum number of segments in a ring. AFAICT,
xhci driver doesn't take that into consideration today. Perhaps the HW
in question doesn't like more than 3 segments.

Mathias, what was the register to check this? Do you remember?

-- 
balbi