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From: Felipe Balbi <felipe.balbi@linux.intel.com>
To: alex zheng <tc0721@gmail.com>
Cc: linux-usb@vger.kernel.org,
	Mathias Nyman <mathias.nyman@linux.intel.com>,
	xiaowei.zheng@dji.com
Subject: Re: BUG report: usb: dwc3: Link TRB triggered an intterupt without IOC being setted
Date: Mon, 23 Sep 2019 13:45:06 +0300	[thread overview]
Message-ID: <87muevs34d.fsf@gmail.com> (raw)
In-Reply-To: <CADGPSwjTn1KwMcxKdajNwxbLi09-SQ1Eu=1m57Z+LNnj0i2BeA@mail.gmail.com>


Hi Alex,

alex zheng <tc0721@gmail.com> writes:
>> > I am a user of dwc3 USB host controller, I found there are some
>> > confused behavior of trb event on this controller.
>> > When I run a raw USB data transfer(run bulk in&out transfer with
>> > libusb) and iperf3(over rndis) at the same time,
>> > there are some strange interrupts occurs and make the driver report
>> > error(ERROR DMA transfer).
>> > And:
>>
>> So dwc3 is workingo n host mode. Which platform is this?
>
> This is our self-design platform (ARM v7 cpu core  with synopsys DWC
> USB3.0 controller).
> version info: Linux localhost 4.9.130-645692-g6ecde01-dirty #394 SMP
> PREEMPT Sun Sep 22 15:10:51 CST 2019 armv7l

This is a brand new design and you're waking it up on v4.9? Could've
tracked upstream more closely, IMHO.

>> > 1. this problem only hapened in USB SS mode
>> > 2. this problem seems not hapen when I run same test case with other
>> > xhci controller(such as asmedia/intel pcie xhci controller) on PC.
>> > 3. the kernel version is 4.9.130
>>
>> Have you tried a more recent kernel? 4.9 is really ancient. Please try
>> v5.3.
>
> Our platform only support 4.9 kernel now, and it may take a lot of
> work to do to support the recent kernel.

In that case, I'm afraid you're on your own. Have a look at known
synopsys errata.

On a side-node, getting a cortex-A7 to boot with upstream kernel should
be only about adding a DeviceTree nowadays. Remember that for Linux to
boot, all you need is a system timer and UART. If you're using ARM IP
for interrupts, timers, etc, it should be really straight forward to
boot on v5.3

> Are there any causes may lead the link TRB trigger a interrupt when
> the IOC bit is not setted?

No idea, perhaps you should have a deeper look at both Synopsys databook
and xHCI specification.

In any case, v4.9 is really old.

Good luck

-- 
balbi

  parent reply	other threads:[~2019-09-23 10:45 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-22  8:34 BUG report: usb: dwc3: Link TRB triggered an intterupt without IOC being setted alex zheng
2019-09-23  5:36 ` Felipe Balbi
2019-09-23  7:08   ` alex zheng
2019-09-23 10:15     ` Mathias Nyman
     [not found]       ` <CADGPSwi87a5+3mCGAgptHgpBsQk9STQrEKs-kC6Nw55nPdRtOw@mail.gmail.com>
2019-09-25 14:48         ` Mathias Nyman
2019-09-25 16:22           ` David Laight
2019-09-26  5:45             ` Felipe Balbi
2019-09-26  8:21               ` Mathias Nyman
2019-09-26 10:38                 ` alex zheng
     [not found]                   ` <CADGPSwhCPvdu=KmQP6RHMJnh292UO0uBAt+KyJqqOWY5DWDc3w@mail.gmail.com>
2019-10-23  9:52                     ` alex zheng
2019-10-23 10:01                       ` Felipe Balbi
2019-10-25  8:44                         ` alex zheng
2019-09-23 10:45     ` Felipe Balbi [this message]
2019-09-24 14:19       ` alex zheng

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