From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96E57C432BE for ; Wed, 4 Aug 2021 14:22:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 778CB60EBC for ; Wed, 4 Aug 2021 14:22:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238683AbhHDOWo (ORCPT ); Wed, 4 Aug 2021 10:22:44 -0400 Received: from guitar.tcltek.co.il ([192.115.133.116]:32812 "EHLO mx.tkos.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237114AbhHDOWm (ORCPT ); Wed, 4 Aug 2021 10:22:42 -0400 Received: from tarshish (unknown [10.0.8.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id 4895544011A; Wed, 4 Aug 2021 17:22:08 +0300 (IDT) References: <3d86f45004fe2fcbae0a2cd197df81a1fd076a1e.1628085910.git.baruch@tkos.co.il> <0e99e3d453547ad2a8f4541090a03f3c80b80332.1628085910.git.baruch@tkos.co.il> <87lf5h5mc2.fsf@kernel.org> User-agent: mu4e 1.4.15; emacs 27.1 From: Baruch Siach To: Felipe Balbi Cc: Kishon Vijay Abraham I , Vinod Koul , Andy Gross , Bjorn Andersson , Rob Herring , "Balaji Prakash J" , Kathiravan T , Jack Pham , Thinh Nguyen , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 4/6] usb: dwc3: reference clock period configuration In-reply-to: <87lf5h5mc2.fsf@kernel.org> Date: Wed, 04 Aug 2021 17:22:27 +0300 Message-ID: <87v94lxpb0.fsf@tarshish> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Hi Felipe, On Wed, Aug 04 2021, Felipe Balbi wrote: > Baruch Siach writes: >> @@ -1371,6 +1398,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) >> &dwc->hsphy_interface); >> device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", >> &dwc->fladj); >> + device_property_read_u32(dev, "snps,ref-clock-period", >> + &dwc->ref_clk_per); > > I wonder if it would make more sense to pass an actual clock reference > here. If valid, then reconfigure the period to the value returned by > clk_get_rate(). It would avoid yet another DT binding. If we make the > clock optional, then we won't affect any other platforms. The clock > itself could be a regular fixed clock node. Thinh Nguyen asked to add a dedicated DT property. He explained that clk_get_rate() does not work for PCI hosted dwc3. This is the most complete summary of the discussion: https://lore.kernel.org/r/c797e9cb-cae6-c0b6-5714-169c2ad79d32@synopsys.com baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -