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[91.155.214.58]) by smtp.gmail.com with ESMTPSA id k3sm5332976lji.43.2020.03.29.03.36.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 29 Mar 2020 03:36:34 -0700 (PDT) From: Felipe Balbi To: Neil Armstrong , kishon@ti.com, khilman@baylibre.com, martin.blumenstingl@googlemail.com Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 00/14] usb: dwc3: meson: add OTG support for GXL/GXM In-Reply-To: <20200326134507.4808-1-narmstrong@baylibre.com> References: <20200326134507.4808-1-narmstrong@baylibre.com> Date: Sun, 29 Mar 2020 13:36:28 +0300 Message-ID: <87v9mne9cj.fsf@kernel.org> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Hi, Neil Armstrong writes: > The USB support was initialy done with a set of PHYs and dwc3-of-simple > because the architecture of the USB complex was not understood correctly > at the time (and proper documentation was missing...). > > But with the G12A family, the USB complex was correctly understood and > implemented correctly. > But seems the G12A architecture was derived for the GXL USB architecture, > with minor differences and looks we can share most of the USB DWC3 glue > driver. > > This patchset refactors and adds callbacks to handle the architecture > difference while keeping the main code shared. > > The main difference is that on GXL/GXM the USB2 PHY control registers > are mixed with the PHY registers (we already handle correctly), and > the GLUE registers are allmost (99%) the same as G12A. > > But, the GXL/GXM HW is buggy, here are the quirks : > - for the DWC2 controller to reset correctly, the GLUE mux must be switch= ed > to peripheral when the DWC2 controller probes. For now it's handled by = simply > switching to device when probing the subnodes, but it may be not enough > - when manually switching from Host to Device when the USB port is not > populated (should not happen with proper Micro-USB/USB-C OTG switch), it > makes the DWC3 to crash. The only way to avoid that is to use the Host > Disconnect bit to disconnect the DWC3 controller from the port, but we = can't > recover the Host functionnality unless resetting the DWC3 controller. > This bit is set when only manual switch is done, and a warning is print= ed > on manual switching. > > The patches 1-9 should be applied first, then either waiting the next rel= ease > or if the usb maintainer can provide us a stable tag, we can use it to me= rge > the DT and bindings. > > Changes since v1 at [1]: > - Fixed DT bindings to take in account usb2-phy2 on GXM > - Added comment in patch2 > - Fixed patch 5 and moved fix out > - Collected tags > - Lower DT patch changes, switch p20x-q20x port B as OTG by default patches 1-6 are applied to my testing/next =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEElLzh7wn96CXwjh2IzL64meEamQYFAl6Aei4ACgkQzL64meEa mQaamxAAwuHxU4drRBYL0UhnH4ujHmfw9zVuZeEVjxAf0eTeCXjxw0u76bgZlbm1 z407kK9bU2znxIUFAEtYZ8SNuPQcnGkEkJBRIAKr9sBlcoqnVl0I6UCCgpAhZh0P /Mkpea+QjUrtIgojPkyM9xnxi42+JwBT6S+rGqgq9KulVVC5TzNWTY5b3IvlJinW 7OruoTHahtfiVqSi5DOzzNRsWvX6R6JolMq8wsa1KOQiVnlB0GTLJFqf8TKrZgWn /PQpbbhk5MUnDgUTIaOWYbfcJrUZd4yt0kkgH8tO3jIH8getvK3JKgZcrsQQ2em6 gmXrQ+o64TaJ+5RFNMJknhcMfnB5jKCAWj8FVHB2P/wOFt1eHu6XOIxBozraEkYW OEa+3RNEFilashPRbm7plsHlqQX98HpliM2+p7mtcgTjWKJeDRMiBc2RXqd8SKcp U7kwWYGv6BZ/EVncImIHgVJ2uTvriB+yeUuMVrZU8u/Rr3eRaOHikb/KJANh00k/ UlpxS89UD2zAd+HT3BqVYuzvtoKJOYO8z0d6DlvV/bzaxSOpWoIFNEL8tGjGDRtu R9HlOcqhoi3amtqVFMR+huIB6ZQIcilLcNA+1mzxwq0qXyVNA+oyY2dskRhgoV+t kFZs/a6g4e5bN8HxaWdDeEdWgts/Cmz+A4PfCTsD26XKggaw8f4= =uyGs -----END PGP SIGNATURE----- --=-=-=--