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From: Roger Quadros <rogerq@ti.com>
To: Peter Chen <peter.chen@nxp.com>, <balbi@kernel.org>
Cc: <linux-usb@vger.kernel.org>, <linux-imx@nxp.com>,
	<pawell@cadence.com>, <gregkh@linuxfoundation.org>,
	<jun.li@nxp.com>
Subject: Re: [PATCH 2/2] usb: cdns3: gadget: toggle cycle bit before reset endpoint
Date: Fri, 14 Feb 2020 10:48:47 +0200
Message-ID: <97bbbf7d-2718-b6a0-2fda-6cac21643dfe@ti.com> (raw)
In-Reply-To: <20200214071414.7256-3-peter.chen@nxp.com>



On 14/02/2020 09:14, Peter Chen wrote:
> If there are TRBs pending during clear stall and reset endpoint, the

s/and/or?

> DMA will advance after reset operation, but it doesn't be expected,

s/doesn't/isn't?

> since the data has still not be ready (For OUT, the data has still

s/"has still not be"/"is not yet"

(e.g. for OUT, the data is not yet available).

> not received). After the data is ready, there isn't any interrupt

s/"there isn't any"/"there won't be any"

> since the EP_TRADDR has already points to next TRB entry.

remove "has"

> 
> To fix it, it toggles cyclt bit before reset operation, and restore

s/cyclt/cycle

s/restore/restores

> it after reset, it could keep DMA stopping.

It prevents DMA from getting stuck up?

> 
> Fixes: 7733f6c32e36 ("usb: cdns3: Add Cadence USB3 DRD Driver")
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
>   drivers/usb/cdns3/gadget.c | 17 ++++++++++++++---
>   1 file changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
> index 1d8a2af35bb0..7b6bb96b91d1 100644
> --- a/drivers/usb/cdns3/gadget.c
> +++ b/drivers/usb/cdns3/gadget.c
> @@ -2595,11 +2595,21 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
>   {
>   	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
>   	struct usb_request *request;
> +	struct cdns3_request *priv_req;
> +	struct cdns3_trb *trb = NULL;
>   	int ret;
>   	int val;
>   
>   	trace_cdns3_halt(priv_ep, 0, 0);
>   
> +	request = cdns3_next_request(&priv_ep->pending_req_list);
> +	if (request) {
> +		priv_req = to_cdns3_request(request);
> +		trb = priv_req->trb;
> +		if (trb)
> +			trb->control = trb->control ^ 1;

use TRB_CYCLE macro instead of 1.

Is it better to toggle this bit or explicitly set/clear it?

> +	}
> +
>   	writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
>   
>   	/* wait for EPRST cleared */
> @@ -2610,10 +2620,11 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
>   
>   	priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
>   
> -	request = cdns3_next_request(&priv_ep->pending_req_list);
> -
> -	if (request)
> +	if (request) {
> +		if (trb)
> +			trb->control = trb->control ^ 1;

same here.

>   		cdns3_rearm_transfer(priv_ep, 1);
> +	}
>   
>   	cdns3_start_all_request(priv_dev, priv_ep);
>   	return ret;
> 

-- 
cheers,
-roger

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

  parent reply index

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-14  7:14 [PATCH 0/2] usb: cdns3: two fixes for gadget Peter Chen
2020-02-14  7:14 ` [PATCH 1/2] usb: cdns3: gadget: link trb should point to next request Peter Chen
2020-02-14  7:14 ` [PATCH 2/2] usb: cdns3: gadget: toggle cycle bit before reset endpoint Peter Chen
2020-02-14  7:41   ` Pawel Laszczak
2020-02-16 13:42     ` Peter Chen
2020-02-14  8:48   ` Roger Quadros [this message]
2020-02-16 13:56     ` Peter Chen

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