From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E034C28CC0 for ; Thu, 30 May 2019 02:17:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2327724428 for ; Thu, 30 May 2019 02:17:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b="VV+59EBm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726653AbfE3CRz (ORCPT ); Wed, 29 May 2019 22:17:55 -0400 Received: from mail-eopbgr150041.outbound.protection.outlook.com ([40.107.15.41]:48894 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726311AbfE3CRz (ORCPT ); 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x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f5c6e834-a328-43d9-3c35-08d6e4a50426 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);SRVR:AM5PR0402MB2881; x-ms-traffictypediagnostic: AM5PR0402MB2881: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 00531FAC2C x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(136003)(346002)(366004)(396003)(376002)(39860400002)(189003)(199004)(7736002)(52536014)(81166006)(316002)(66946007)(9686003)(8936002)(64756008)(66556008)(229853002)(71200400001)(66066001)(4326008)(76116006)(446003)(66476007)(11346002)(71190400001)(305945005)(486006)(476003)(14444005)(68736007)(256004)(81156014)(74316002)(86362001)(6246003)(102836004)(2906002)(26005)(73956011)(5660300002)(8676002)(6506007)(7696005)(53546011)(6436002)(66446008)(53936002)(33656002)(25786009)(6916009)(55016002)(6116002)(3846002)(54906003)(14454004)(186003)(478600001)(99286004)(76176011);DIR:OUT;SFP:1101;SCL:1;SRVR:AM5PR0402MB2881;H:AM5PR0402MB2865.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: oNI7vJm8GJgd/dEva3fPZYPX3F9AVbgo9cU4GZL3ntgeZCKqR6Yg+gHSgHKfj4JGhCp30Hau981pfscQgGrQms0krJxlR7N+gsVWY2QMd3e2T+HpmQ4Mei8ZLS23yk66IbdAEApIj8a3hGcImd0IP/lEySxxZcZYyGaXh4q+bhNkaMoY4k2B1MtStNub8qzK3rdymuRHu6ko5WUmcmQHCQ+4MFheBe43/C0uvRmoAAGXvXIb8qP/3ahvtN5NP3KUbV8RkODiEkNXUL+Co1PD8bw3CjP2H4b/RKqKoedK3vBw8UfiSHarNNcaYPegDNqNxeBYRMUF66zGlgbwXsKxXxqPOe/JzjbEFjwS7kuPZXdcP5iEWHWrqSRoqEoBwdxCIh3Ja0/O8ScLo1+rTMLrvh6Gp1Unaab6OuYoC/mZTPM= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f5c6e834-a328-43d9-3c35-08d6e4a50426 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 May 2019 02:17:50.8684 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ran.wang_1@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0402MB2881 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Hi Felipe, On Wednesday, May 29, 2019 18:25, Felipe Balbi wrote: >=20 > Hi, >=20 > Ran Wang writes: > >> >> >> c) WHAT does this mean for PCI devices? > > > > According to DWC3 data book, I think this (PCI) mean to the case of 'ma= ster > bus type =3D Native' > > The data book describes this feature as 'system bus DMA option for the > > master bus, which may be configured as AHB, AXI, or Native.' On Table > > 6-5, it says when MBUS_TYPE is Native, the definition of 4 transfer typ= es > control bits [3-0] is 'Same as AXI'. > > > > However, as to the code implementation to be generic to both PCI and > > AXI, I admit I don't have a perfect solution so far, only 2 proposals w= ith > concerns: > > > > a. Create another module driver like dwc3-exynos.c > (arch/arm/boot/dts/wxynos54xx.dtsi) > > to contain above programming code. However, it will touch the same = reg > range of DWC3 > > I think this is not good. >=20 > I'd prefer avoiding another glue :-) Got it. =20 > > b. Add #ifdef CONFIG_ARCH_LAYERSCAPE in drivers/usb/dwc3/core.c to > constrain hacking code > > can only take effect for Layerscape (AXI case). I know it look ugly. > > > > Do you have any better advice on this (besides changed power on default > value from HW perspective)? >=20 > Maybe we don't need to care, actually. Since this property will only be n= eeded > for RTL instantiation that didn't configure these defaults properly durin= g > coreConsultant. Ok, I think I could add information in bindings to highlight this setting m= ight be RTL instantiation (SoC) relevant to prevent misusing. > >> >> >> Another question is: Why wasn't this setup properly during > >> >> >> coreConsultant instantiation of the RTL? Do you have devices on > >> >> >> the market already that need this or is this some early FPGA > >> >> >> model or test-only > >> >> ASIC? > > > > Several Layerscape platforms like LS1043ARDB, LS1046ARDB, etc. are > > already on the market and have this issue. So I have to work out a SW p= atch to > fix them. >=20 > Thank you, now I'm certain that this is not some temporary solution :-) >=20 > Thanks for going through this again. Please refresh the patch so we can t= ry to > get it merged. Sure, as I know all LS1043A and LS1046A relevant platforms have added 'dma-= coherent' to DTS node of 'soc' in mainline, which means without this fix USB function= will down definitely, I will go through all update requirement we've discussed and wo= rk out next version patch. Thank you. Regards, Ran=20