From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48924C4338F for ; Fri, 20 Aug 2021 05:34:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 28FE161051 for ; Fri, 20 Aug 2021 05:34:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235390AbhHTFfE (ORCPT ); Fri, 20 Aug 2021 01:35:04 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:21021 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231256AbhHTFfB (ORCPT ); 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Fri, 20 Aug 2021 05:34:23 +0000 (UTC) Received: from [192.168.0.104] (unknown [49.206.50.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sanm) by smtp.codeaurora.org (Postfix) with ESMTPSA id A5B51C4338F; Fri, 20 Aug 2021 05:34:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org A5B51C4338F Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org Subject: Re: [PATCH v5 2/3] arm64: dts: qcom: sc7280: Add USB related nodes To: Stephen Boyd , Andy Gross , Bjorn Andersson , Doug Anderson , Felipe Balbi , Greg Kroah-Hartman , Matthias Kaehlcke , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Pratham Pratap References: <1625576413-12324-1-git-send-email-sanm@codeaurora.org> <1625576413-12324-3-git-send-email-sanm@codeaurora.org> From: Sandeep Maheswaram Message-ID: Date: Fri, 20 Aug 2021 11:04:14 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Hi Stephen, On 8/18/2021 1:28 AM, Stephen Boyd wrote: > Quoting Sandeep Maheswaram (2021-07-06 06:00:12) >> Add nodes for DWC3 USB controller, QMP and HS USB PHYs in sc7280 SOC. >> >> Signed-off-by: Sandeep Maheswaram >> Reviewed-by: Matthias Kaehlcke >> --- >> Changed qmp usb phy to usb dp phy combo node as per Stephen's comments. >> Changed dwc to usb and added SC7280 compatible as per Bjorn's comments. >> >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 164 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 164 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index a8c274a..cd6908f 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -1035,6 +1035,125 @@ >> }; >> }; >> > [...] >> + >> + usb_2: usb@8cf8800 { >> + compatible = "qcom,sc7280-dwc3", "qcom,dwc3"; >> + reg = <0 0x08cf8800 0 0x400>; >> + status = "disabled"; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + dma-ranges; >> + >> + clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, >> + <&gcc GCC_USB30_SEC_MASTER_CLK>, >> + <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, >> + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, >> + <&gcc GCC_USB30_SEC_SLEEP_CLK>; >> + clock-names = "cfg_noc", "core", "iface","mock_utmi", >> + "sleep"; >> + >> + assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, >> + <&gcc GCC_USB30_SEC_MASTER_CLK>; >> + assigned-clock-rates = <19200000>, <200000000>; >> + >> + interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, >> + <&pdc 13 IRQ_TYPE_EDGE_RISING>, >> + <&pdc 12 IRQ_TYPE_EDGE_RISING>; > I'm seeing this cause a warning at boot > > [ 4.724756] irq: type mismatch, failed to map hwirq-12 for > interrupt-controller@b220000! > [ 4.733401] irq: type mismatch, failed to map hwirq-13 for > interrupt-controller@b220000! I should be using  IRQ_TYPE_LEVEL_HIGH. Will correct in next version. >> + interrupt-names = "hs_phy_irq", >> + "dm_hs_phy_irq", "dp_hs_phy_irq"; >> + >> + power-domains = <&gcc GCC_USB30_SEC_GDSC>; >> + >> + resets = <&gcc GCC_USB30_SEC_BCR>; >> + >> + usb_2_dwc3: usb@8c00000 { >> + compatible = "snps,dwc3"; >> + reg = <0 0x08c00000 0 0xe000>; >> + interrupts = ; >> + iommus = <&apps_smmu 0xa0 0x0>; >> + snps,dis_u2_susphy_quirk; >> + snps,dis_enblslpm_quirk; >> + phys = <&usb_2_hsphy>; >> + phy-names = "usb2-phy"; >> + maximum-speed = "high-speed"; >> + }; >> + }; >> + >> dc_noc: interconnect@90e0000 { >> reg = <0 0x090e0000 0 0x5080>; >> compatible = "qcom,sc7280-dc-noc"; >> @@ -1063,6 +1182,51 @@ >> qcom,bcm-voters = <&apps_bcm_voter>; >> }; >> >> + usb_1: usb@a6f8800 { >> + compatible = "qcom,sc7280-dwc3", "qcom,dwc3"; >> + reg = <0 0x0a6f8800 0 0x400>; >> + status = "disabled"; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + dma-ranges; >> + >> + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, >> + <&gcc GCC_USB30_PRIM_MASTER_CLK>, >> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, >> + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, >> + <&gcc GCC_USB30_PRIM_SLEEP_CLK>; >> + clock-names = "cfg_noc", "core", "iface", "mock_utmi", >> + "sleep"; >> + >> + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, >> + <&gcc GCC_USB30_PRIM_MASTER_CLK>; >> + assigned-clock-rates = <19200000>, <200000000>; >> + >> + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, >> + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, >> + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, > And this one too. > > [ 4.898667] irq: type mismatch, failed to map hwirq-14 for > interrupt-controller@b220000! > [ 4.907241] irq: type mismatch, failed to map hwirq-15 for > interrupt-controller@b220000! > > which looks like genirq code is complaining that the type is different > than what it is configured for. Are these trigger flags correct? If so, > then there' some sort of bug in the pdc driver. I should be using  IRQ_TYPE_LEVEL_HIGH. Will correct in next version. > >> + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", >> + "dm_hs_phy_irq", "ss_phy_irq"; >> + >> + power-domains = <&gcc GCC_USB30_PRIM_GDSC>; >> + >> + resets = <&gcc GCC_USB30_PRIM_BCR>; >> + >> + usb_1_dwc3: usb@a600000 {