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From: Paul Cercueil <paul@crapouillou.net>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org,
	linux-mips@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH v9 14/27] pwm: jz4740: Improve algorithm of clock calculation
Date: Sat, 05 Jan 2019 18:05:38 -0300
Message-ID: <1546722339.30174.0@crapouillou.net> (raw)
In-Reply-To: <20190105195725.cuxfge6zkpbt3cyk@pengutronix.de>

Hi,

On Sat, Jan 5, 2019 at 4:57 PM, Uwe Kleine-König 
<u.kleine-koenig@pengutronix.de> wrote:
> On Thu, Dec 27, 2018 at 07:13:06PM +0100, Paul Cercueil wrote:
>>  The previous algorithm hardcoded details about how the TCU clocks 
>> work.
>>  The new algorithm will use clk_round_rate to find the perfect clock 
>> rate
>>  for the PWM channel.
>> 
>>  Signed-off-by: Paul Cercueil <paul@crapouillou.net>
>>  ---
>> 
>>  Notes:
>>       v9: New patch
>> 
>>   drivers/pwm/pwm-jz4740.c | 26 +++++++++++++++-----------
>>   1 file changed, 15 insertions(+), 11 deletions(-)
>> 
>>  diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
>>  index c6136bd4434b..dd80a2cf6528 100644
>>  --- a/drivers/pwm/pwm-jz4740.c
>>  +++ b/drivers/pwm/pwm-jz4740.c
>>  @@ -110,23 +110,27 @@ static int jz4740_pwm_apply(struct pwm_chip 
>> *chip, struct pwm_device *pwm,
>>   	struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
>>   	struct clk *clk = jz4740->clks[pwm->hwpwm],
>>   		   *parent_clk = clk_get_parent(clk);
>>  -	unsigned long rate, period, duty;
>>  +	unsigned long rate, new_rate, period, duty;
>>   	unsigned long long tmp;
>>  -	unsigned int prescaler = 0;
>> 
>>   	rate = clk_get_rate(parent_clk);
>>  -	tmp = (unsigned long long)rate * state->period;
>>  -	do_div(tmp, 1000000000);
>>  -	period = tmp;
>> 
>>  -	while (period > 0xffff && prescaler < 6) {
>>  -		period >>= 2;
>>  -		rate >>= 2;
>>  -		++prescaler;
>>  +	for (;;) {
>>  +		tmp = (unsigned long long)rate * state->period;
>>  +		do_div(tmp, 1000000000);
> 
> NSEC_PER_SEC?

Ok, didn't know about it.

>>  +
>>  +		if (tmp <= 0xffff)
>>  +			break;
>>  +
>>  +		new_rate = clk_round_rate(clk, rate - 1);
>>  +
>>  +		if (new_rate < rate)
>>  +			rate = new_rate;
>>  +		else
>>  +			return -EINVAL;
> 
> You are assuming stuff here about the parent clk which isn't 
> guaranteed
> (AFAICT) by the clk framework: If you call clk_round_rate(clk, rate - 
> 1)
> this might well return rate even if the clock could run slower than
> rate.

It may not be guaranteed by the clock framework itself, but it is 
guaranteed
to behave like that on this family of SoCs.

> Wouldn't it make sense to start iterating with rate = 0xffff * 1e9 /
> period? Otherwise you get bad configurations if rate is considerable
> slower than necessary.

The algorithm will start with 'rate' being the parent clock's rate, 
which
will always be the highest rate that the child clock will support.

> Best regards
> Uwe
> 
> --
> Pengutronix e.K.                           | Uwe Kleine-König        
>     |
> Industrial Linux Solutions                 | 
> http://www.pengutronix.de/  |


  reply index

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-27 18:12 [PATCH v9 00/27] Ingenic TCU patchset v9 Paul Cercueil
2018-12-27 18:12 ` [PATCH v9 01/27] dt-bindings: ingenic: Add DT bindings for TCU clocks Paul Cercueil
2018-12-27 18:12 ` [PATCH v9 02/27] doc: Add doc for the Ingenic TCU hardware Paul Cercueil
2018-12-27 18:12 ` [PATCH v9 03/27] dt-bindings: Add doc for the Ingenic TCU drivers Paul Cercueil
2018-12-28 21:48   ` Rob Herring
2018-12-27 18:12 ` [PATCH v9 04/27] clocksource: Add a new timer-ingenic driver Paul Cercueil
2019-02-25 15:55   ` Daniel Lezcano
2019-02-25 22:59     ` Paul Cercueil
2018-12-27 18:12 ` [PATCH v9 05/27] clocksource: Add driver for the Ingenic JZ47xx OST Paul Cercueil
2018-12-27 18:12 ` [PATCH v9 06/27] MAINTAINERS: Add myself as maintainer for Ingenic TCU drivers Paul Cercueil
2018-12-27 18:12 ` [PATCH v9 07/27] watchdog: jz4740: Use WDT clock provided by TCU driver Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 08/27] watchdog: jz4740: Use regmap " Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 09/27] watchdog: jz4740: Avoid starting watchdog in set_timeout Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 10/27] watchdog: jz4740: Drop dependency on MACH_JZ47xx, use COMPILE_TEST Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 11/27] pwm: jz4740: Apply configuration atomically Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 12/27] pwm: jz4740: Use regmap from TCU driver Paul Cercueil
2019-01-05 19:42   ` Uwe Kleine-König
2019-01-05 20:46     ` Paul Cercueil
2019-01-05 21:18       ` Uwe Kleine-König
2018-12-27 18:13 ` [PATCH v9 13/27] pwm: jz4740: Use clocks " Paul Cercueil
2019-01-05 19:45   ` Uwe Kleine-König
2019-01-05 20:52     ` Paul Cercueil
2019-01-05 21:19       ` Uwe Kleine-König
2018-12-27 18:13 ` [PATCH v9 14/27] pwm: jz4740: Improve algorithm of clock calculation Paul Cercueil
2019-01-05 19:57   ` Uwe Kleine-König
2019-01-05 21:05     ` Paul Cercueil [this message]
2019-01-05 21:27       ` Uwe Kleine-König
2019-01-10 14:04         ` Paul Cercueil
2019-02-23  1:17           ` Paul Cercueil
2019-02-28 18:42             ` Stephen Boyd
2018-12-27 18:13 ` [PATCH v9 15/27] pwm: jz4740: Allow selection of PWM channels 0 and 1 Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 16/27] pwm: jz4740: Drop dependency on MACH_INGENIC, use COMPILE_TEST Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 17/27] pwm: jz4740: Remove unused devicetree compatible strings Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 18/27] clk: jz4740: Add TCU clock Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 19/27] MIPS: Kconfig: Select TCU timer driver when MACH_INGENIC is set Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 20/27] MIPS: jz4740: Add DTS nodes for the TCU drivers Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 21/27] MIPS: qi_lb60: Move PWM devices to devicetree Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 22/27] MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHz Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 23/27] MIPS: CI20: Reduce system timer to 3 MHz Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 24/27] MIPS: CI20: defconfig: enable OST driver Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 25/27] MIPS: GCW0: Reduce system timer to 750 kHz Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 26/27] MIPS: GCW0: defconfig: Enable OST, watchdog, PWM drivers Paul Cercueil
2018-12-27 18:13 ` [PATCH v9 27/27] MIPS: jz4740: Drop obsolete code Paul Cercueil

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