From: <Eugen.Hristev@microchip.com>
To: <robh+dt@kernel.org>, <linux@roeck-us.net>,
<wim@linux-watchdog.org>, <Nicolas.Ferre@microchip.com>,
<alexandre.belloni@bootlin.com>, <linux-watchdog@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: <Eugen.Hristev@microchip.com>
Subject: [PATCH v3 1/3] watchdog: sama5d4_wdt: cleanup the bit definitions
Date: Mon, 11 Nov 2019 12:13:30 +0000 [thread overview]
Message-ID: <1573474383-21915-1-git-send-email-eugen.hristev@microchip.com> (raw)
From: Eugen Hristev <eugen.hristev@microchip.com>
Cleanup the macro definitions to use BIT and align with two spaces.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
---
Changes in v3:
- new patch as requested from review on ML
drivers/watchdog/at91sam9_wdt.h | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
index 390941c..2ca5fc5 100644
--- a/drivers/watchdog/at91sam9_wdt.h
+++ b/drivers/watchdog/at91sam9_wdt.h
@@ -14,23 +14,23 @@
#define AT91_WDT_H
#define AT91_WDT_CR 0x00 /* Watchdog Control Register */
-#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
-#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
+#define AT91_WDT_WDRSTT BIT(0) /* Restart */
+#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
-#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
-#define AT91_WDT_SET_WDV(x) ((x) & AT91_WDT_WDV)
-#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
-#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
-#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */
-#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */
-#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
-#define AT91_WDT_SET_WDD(x) (((x) << 16) & AT91_WDT_WDD)
-#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
-#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
+#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
+#define AT91_WDT_SET_WDV(x) ((x) & AT91_WDT_WDV)
+#define AT91_WDT_WDFIEN BIT(12) /* Fault Interrupt Enable */
+#define AT91_WDT_WDRSTEN BIT(13) /* Reset Processor */
+#define AT91_WDT_WDRPROC BIT(14) /* Timer Restart */
+#define AT91_WDT_WDDIS BIT(15) /* Watchdog Disable */
+#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
+#define AT91_WDT_SET_WDD(x) (((x) << 16) & AT91_WDT_WDD)
+#define AT91_WDT_WDDBGHLT BIT(28) /* Debug Halt */
+#define AT91_WDT_WDIDLEHLT BIT(29) /* Idle Halt */
-#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
-#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
-#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
+#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
+#define AT91_WDT_WDUNF BIT(0) /* Watchdog Underflow */
+#define AT91_WDT_WDERR BIT(1) /* Watchdog Error */
#endif
--
2.7.4
next reply other threads:[~2019-11-11 12:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-11 12:13 Eugen.Hristev [this message]
2019-11-11 12:13 ` [PATCH v3 2/3] dt-bindings: watchdog: sama5d4_wdt: add microchip,sam9x60-wdt compatible Eugen.Hristev
2019-11-11 12:13 ` [PATCH v3 3/3] watchdog: sama5d4_wdt: addition of sam9x60 compatible watchdog Eugen.Hristev
2019-11-12 14:01 ` Guenter Roeck
2019-11-12 13:47 ` [PATCH v3 1/3] watchdog: sama5d4_wdt: cleanup the bit definitions Guenter Roeck
2019-11-14 11:34 ` Eugen.Hristev
2019-11-14 16:08 ` Guenter Roeck
2019-11-12 21:24 ` kbuild test robot
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