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* [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC
@ 2021-03-16 11:14 Seiya Wang
  2021-03-16 11:14 ` [PATCH 01/10] dt-bindings: timer: Add compatible for Mediatek MT8195 Seiya Wang
                   ` (10 more replies)
  0 siblings, 11 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream


MT8195 is a SoC based on 64bit ARMv8 architecture.
It contains 4 CA55 and 4 CA78 cores.
MT8195 share many HW IP with MT65xx series.
This patchset was tested on MT8195 evaluation board to shell.

Based on v5.12-rc2

Seiya Wang (10):
  dt-bindings: timer: Add compatible for Mediatek MT8195
  dt-bindings: serial: Add compatible for Mediatek MT8195
  dt-bindings: watchdog: Add compatible for Mediatek MT8195
  dt-bindings: mmc: Add compatible for Mediatek MT8195
  dt-bindings: spi: Add compatible for Mediatek MT8195
  dt-bindings: iio: adc: Add compatible for Mediatek MT8195
  dt-bindings: phy: Add compatible for Mediatek MT8195
  dt-bindings: phy: Add compatible for Mediatek MT8195
  dt-bindings: arm: Add compatible for Mediatek MT8195
  arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and
    Makefile

 .../devicetree/bindings/arm/mediatek.yaml          |   4 +
 .../bindings/iio/adc/mediatek,mt2701-auxadc.yaml   |   1 +
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml  |   1 +
 .../devicetree/bindings/phy/mediatek,tphy.yaml     |   1 +
 .../devicetree/bindings/phy/mediatek,ufs-phy.yaml  |   1 +
 .../devicetree/bindings/serial/mtk-uart.txt        |   1 +
 .../bindings/spi/mediatek,spi-mtk-nor.yaml         |   1 +
 .../bindings/timer/mediatek,mtk-timer.txt          |   1 +
 .../devicetree/bindings/watchdog/mtk-wdt.txt       |   1 +
 arch/arm64/boot/dts/mediatek/Makefile              |   1 +
 arch/arm64/boot/dts/mediatek/mt8195-evb.dts        |  29 ++
 arch/arm64/boot/dts/mediatek/mt8195.dtsi           | 477 +++++++++++++++++++++
 12 files changed, 519 insertions(+)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
 create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi

--
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 01/10] dt-bindings: timer: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 11:14 ` [PATCH 02/10] dt-bindings: serial: " Seiya Wang
                   ` (9 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of timer for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
index 690a9c0966ac..e5c57d6e0186 100644
--- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
+++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
@@ -23,6 +23,7 @@ Required properties:
 	For those SoCs that use SYST
 	* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
 	* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
+	* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)
 	* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)
 	* "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST)
 
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 02/10] dt-bindings: serial: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
  2021-03-16 11:14 ` [PATCH 01/10] dt-bindings: timer: Add compatible for Mediatek MT8195 Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 11:14 ` [PATCH 03/10] dt-bindings: watchdog: " Seiya Wang
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of uart for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index 647b5aee86f3..64c4fb59acd1 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -20,6 +20,7 @@ Required properties:
   * "mediatek,mt8173-uart" for MT8173 compatible UARTS
   * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
   * "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS
+  * "mediatek,mt8195-uart", "mediatek,mt6577-uart" for MT8195 compatible UARTS
   * "mediatek,mt8516-uart" for MT8516 compatible UARTS
   * "mediatek,mt6577-uart" for MT6577 and all of the above
 
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 03/10] dt-bindings: watchdog: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
  2021-03-16 11:14 ` [PATCH 01/10] dt-bindings: timer: Add compatible for Mediatek MT8195 Seiya Wang
  2021-03-16 11:14 ` [PATCH 02/10] dt-bindings: serial: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 21:15   ` Guenter Roeck
  2021-03-16 11:14 ` [PATCH 04/10] dt-bindings: mmc: " Seiya Wang
                   ` (7 subsequent siblings)
  10 siblings, 1 reply; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of watchdog for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
index e36ba60de829..a658a0b92b9a 100644
--- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
@@ -13,6 +13,7 @@ Required properties:
 	"mediatek,mt8183-wdt": for MT8183
 	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
 	"mediatek,mt8192-wdt": for MT8192
+	"mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195
 
 - reg : Specifies base physical address and size of the registers.
 
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 04/10] dt-bindings: mmc: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (2 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 03/10] dt-bindings: watchdog: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 11:14 ` [PATCH 05/10] dt-bindings: spi: " Seiya Wang
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of mmc for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 01630b0ecea7..8648d48dbbfd 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -31,6 +31,7 @@ properties:
           - const: mediatek,mt2701-mmc
       - items:
           - const: mediatek,mt8192-mmc
+          - const: mediatek,mt8195-mmc
           - const: mediatek,mt8183-mmc
 
   clocks:
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 05/10] dt-bindings: spi: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (3 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 04/10] dt-bindings: mmc: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 11:14 ` [PATCH 06/10] dt-bindings: iio: adc: " Seiya Wang
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of spi nor for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
index 55c239446a5b..7393f30535df 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -31,6 +31,7 @@ properties:
               - mediatek,mt7623-nor
               - mediatek,mt7629-nor
               - mediatek,mt8192-nor
+              - mediatek,mt8195-nor
           - enum:
               - mediatek,mt8173-nor
       - items:
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 06/10] dt-bindings: iio: adc: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (4 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 05/10] dt-bindings: spi: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 11:14 ` [PATCH 07/10] dt-bindings: phy: " Seiya Wang
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of auxadc for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml
index 5b21a9fba5dd..b939f9652e3a 100644
--- a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml
@@ -34,6 +34,7 @@ properties:
       - items:
           - enum:
               - mediatek,mt8183-auxadc
+              - mediatek,mt8195-auxadc
               - mediatek,mt8516-auxadc
           - const: mediatek,mt8173-auxadc
 
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 07/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (5 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 06/10] dt-bindings: iio: adc: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-17  6:39   ` Vinod Koul
  2021-03-16 11:14 ` [PATCH 08/10] " Seiya Wang
                   ` (3 subsequent siblings)
  10 siblings, 1 reply; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of T-Phy for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 602e6ff45785..c5b436ad6239 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -79,6 +79,7 @@ properties:
               - mediatek,mt2712-tphy
               - mediatek,mt7629-tphy
               - mediatek,mt8183-tphy
+              - mediatek,mt8195-tphy
           - const: mediatek,generic-tphy-v2
       - const: mediatek,mt2701-u3phy
         deprecated: true
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 08/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (6 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 07/10] dt-bindings: phy: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-17  6:40   ` Vinod Koul
  2021-03-18  2:19   ` Chunfeng Yun
  2021-03-16 11:14 ` [PATCH 09/10] dt-bindings: arm: " Seiya Wang
                   ` (2 subsequent siblings)
  10 siblings, 2 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation of UFS M-Phy for Mediatek MT8195 SoC
Platform.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
index 3a9be82e7f13..5235b1a0d188 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
@@ -22,6 +22,7 @@ properties:
     pattern: "^ufs-phy@[0-9a-f]+$"
 
   compatible:
+    enum: mediatek,mt8195-ufsphy
     const: mediatek,mt8183-ufsphy
 
   reg:
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 09/10] dt-bindings: arm: Add compatible for Mediatek MT8195
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (7 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 08/10] " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-16 11:14 ` [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile Seiya Wang
  2021-03-16 17:59 ` (subset) [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Mark Brown
  10 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

This commit adds dt-binding documentation for the Mediatek MT8195
reference board.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
index 93b3bdf6eaeb..a95224fcff9f 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -118,6 +118,10 @@ properties:
           - enum:
               - mediatek,mt8183-evb
           - const: mediatek,mt8183
+      - items:
+          - enum:
+              - mediatek,mt8195-evb
+          - const: mediatek,mt8195
       - description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
         items:
           - enum:
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (8 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 09/10] dt-bindings: arm: " Seiya Wang
@ 2021-03-16 11:14 ` Seiya Wang
  2021-03-18  2:57   ` Chunfeng Yun
  2021-03-16 17:59 ` (subset) [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Mark Brown
  10 siblings, 1 reply; 20+ messages in thread
From: Seiya Wang @ 2021-03-16 11:14 UTC (permalink / raw)
  To: Rob Herring, Matthias Brugger
  Cc: Jonathan Cameron, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Ulf Hansson, Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Guenter Roeck, Enric Balletbo i Serra,
	Hsin-Yi Wang, Seiya Wang, Fabien Parent, Sean Wang, Zhiyong Tao,
	Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

Add basic chip support for Mediatek MT8195

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/Makefile       |   1 +
 arch/arm64/boot/dts/mediatek/mt8195-evb.dts |  29 ++
 arch/arm64/boot/dts/mediatek/mt8195.dtsi    | 477 ++++++++++++++++++++++++++++
 3 files changed, 507 insertions(+)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
 create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi

diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index deba27ab7657..aee4b9715d2f 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -16,4 +16,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
new file mode 100644
index 000000000000..82bb10e9a531
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Seiya Wang <seiya.wang@mediatek.com>
+ */
+/dts-v1/;
+#include "mt8195.dtsi"
+
+/ {
+	model = "MediaTek MT8195 evaluation board";
+	compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:921600n8";
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
new file mode 100644
index 000000000000..356583fe4f03
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -0,0 +1,477 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Seiya Wang <seiya.wang@mediatek.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "mediatek,mt8195";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	clocks {
+		clk26m: oscillator0 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <26000000>;
+			clock-output-names = "clk26m";
+		};
+
+		clk32k: oscillator1 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+			clock-output-names = "clk32k";
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55", "arm,armv8";
+			reg = <0x000>;
+			enable-method = "psci";
+			clock-frequency = <1701000000>;
+			capacity-dmips-mhz = <578>;
+			cpu-idle-states = <&cpuoff_l &clusteroff_l>;
+			next-level-cache = <&l2_0>;
+			#cooling-cells = <2>;
+		};
+
+		cpu1: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55", "arm,armv8";
+			reg = <0x100>;
+			enable-method = "psci";
+			clock-frequency = <1701000000>;
+			capacity-dmips-mhz = <578>;
+			cpu-idle-states = <&cpuoff_l &clusteroff_l>;
+			next-level-cache = <&l2_0>;
+			#cooling-cells = <2>;
+		};
+
+		cpu2: cpu@200 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55", "arm,armv8";
+			reg = <0x200>;
+			enable-method = "psci";
+			clock-frequency = <1701000000>;
+			capacity-dmips-mhz = <578>;
+			cpu-idle-states = <&cpuoff_l &clusteroff_l>;
+			next-level-cache = <&l2_0>;
+			#cooling-cells = <2>;
+		};
+
+		cpu3: cpu@300 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55", "arm,armv8";
+			reg = <0x300>;
+			enable-method = "psci";
+			clock-frequency = <1701000000>;
+			capacity-dmips-mhz = <578>;
+			cpu-idle-states = <&cpuoff_l &clusteroff_l>;
+			next-level-cache = <&l2_0>;
+			#cooling-cells = <2>;
+		};
+
+		cpu4: cpu@400 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78", "arm,armv8";
+			reg = <0x400>;
+			enable-method = "psci";
+			clock-frequency = <2171000000>;
+			capacity-dmips-mhz = <1024>;
+			cpu-idle-states = <&cpuoff_b &clusteroff_b>;
+			next-level-cache = <&l2_1>;
+			#cooling-cells = <2>;
+		};
+
+		cpu5: cpu@500 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78", "arm,armv8";
+			reg = <0x500>;
+			enable-method = "psci";
+			clock-frequency = <2171000000>;
+			capacity-dmips-mhz = <1024>;
+			cpu-idle-states = <&cpuoff_b &clusteroff_b>;
+			next-level-cache = <&l2_1>;
+			#cooling-cells = <2>;
+		};
+
+		cpu6: cpu@600 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78", "arm,armv8";
+			reg = <0x600>;
+			enable-method = "psci";
+			clock-frequency = <2171000000>;
+			capacity-dmips-mhz = <1024>;
+			cpu-idle-states = <&cpuoff_b &clusteroff_b>;
+			next-level-cache = <&l2_1>;
+			#cooling-cells = <2>;
+		};
+
+		cpu7: cpu@700 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78", "arm,armv8";
+			reg = <0x700>;
+			enable-method = "psci";
+			clock-frequency = <2171000000>;
+			capacity-dmips-mhz = <1024>;
+			cpu-idle-states = <&cpuoff_b &clusteroff_b>;
+			next-level-cache = <&l2_1>;
+			#cooling-cells = <2>;
+		};
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+				core2 {
+					cpu = <&cpu2>;
+				};
+				core3 {
+					cpu = <&cpu3>;
+				};
+			};
+			cluster1 {
+				core0 {
+					cpu = <&cpu4>;
+				};
+				core1 {
+					cpu = <&cpu5>;
+				};
+				core2 {
+					cpu = <&cpu6>;
+				};
+				core3 {
+					cpu = <&cpu7>;
+				};
+			};
+		};
+
+		idle-states {
+			entry-method = "arm,psci";
+			cpuoff_l: cpuoff_l {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x00010001>;
+				local-timer-stop;
+				entry-latency-us = <50>;
+				exit-latency-us = <95>;
+				min-residency-us = <580>;
+			};
+			cpuoff_b: cpuoff_b {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x00010001>;
+				local-timer-stop;
+				entry-latency-us = <45>;
+				exit-latency-us = <140>;
+				min-residency-us = <740>;
+			};
+			clusteroff_l: clusteroff_l {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x01010002>;
+				local-timer-stop;
+				entry-latency-us = <55>;
+				exit-latency-us = <155>;
+				min-residency-us = <840>;
+			};
+			clusteroff_b: clusteroff_b {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x01010002>;
+				local-timer-stop;
+				entry-latency-us = <50>;
+				exit-latency-us = <200>;
+				min-residency-us = <1000>;
+			};
+		};
+
+		l2_0: l2-cache0 {
+			compatible = "cache";
+			next-level-cache = <&l3_0>;
+		};
+
+		l2_1: l2-cache1 {
+			compatible = "cache";
+			next-level-cache = <&l3_0>;
+		};
+
+		l3_0: l3-cache {
+			compatible = "cache";
+		};
+	};
+
+	dsu-pmu {
+		compatible = "arm,dsu-pmu";
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
+		cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
+		       <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+	};
+
+	pmu-a55 {
+		compatible = "arm,cortex-a55-pmu";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>;
+	};
+
+	pmu-a78 {
+		compatible = "arm,cortex-a78-pmu";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer: timer {
+		compatible = "arm,armv8-timer";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
+		clock-frequency = <13000000>;
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+
+		gic: interrupt-controller@c000000 {
+			compatible = "arm,gic-v3";
+			#interrupt-cells = <4>;
+			#redistributor-regions = <1>;
+			interrupt-parent = <&gic>;
+			interrupt-controller;
+			reg = <0 0x0c000000 0 0x40000>,
+			      <0 0x0c040000 0 0x200000>;
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
+
+			ppi-partitions {
+				ppi_cluster0: interrupt-partition-0 {
+					affinity = <&cpu0 &cpu1 &cpu2 &cpu3>;
+				};
+				ppi_cluster1: interrupt-partition-1 {
+					affinity = <&cpu4 &cpu5 &cpu6 &cpu7>;
+				};
+			};
+		};
+
+		watchdog: watchdog@10007000 {
+			compatible = "mediatek,mt8195-wdt", "mediatek,mt6589-wdt";
+			reg = <0 0x10007000 0 0x100>;
+		};
+
+		systimer: timer@10017000 {
+			compatible = "mediatek,mt8195-timer", "mediatek,mt6765-timer";
+			reg = <0 0x10017000 0 0x1000>;
+			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>;
+		};
+
+		uart0: serial@11001100 {
+			compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
+			reg = <0 0x11001100 0 0x100>;
+			interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "baud", "bus";
+			status = "disabled";
+		};
+
+		uart1: serial@11001200 {
+			compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
+			reg = <0 0x11001200 0 0x100>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "baud", "bus";
+		};
+
+		uart2: serial@11001300 {
+			compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
+			reg = <0 0x11001300 0 0x100>;
+			interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "baud", "bus";
+			status = "disabled";
+		};
+
+		uart3: serial@11001400 {
+			compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
+			reg = <0 0x11001400 0 0x100>;
+			interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "baud", "bus";
+			status = "disabled";
+		};
+
+		uart4: serial@11001500 {
+			compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
+			reg = <0 0x11001500 0 0x100>;
+			interrupts = <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "baud", "bus";
+			status = "disabled";
+		};
+
+		uart5: serial@11001600 {
+			compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
+			reg = <0 0x11001600 0 0x100>;
+			interrupts = <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "baud", "bus";
+			status = "disabled";
+		};
+
+		auxadc: auxadc@11002000 {
+			compatible = "mediatek,mt8195-auxadc", "mediatek,mt8173-auxadc";
+			reg = <0 0x11002000 0 0x1000>;
+			clocks = <&clk26m>;
+			clock-names = "main";
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
+
+		mmc0: mmc@11230000 {
+			compatible = "mediatek,mt8195-mmc", "mediatek,mt8192-mmc";
+			reg = <0 0x11230000 0 0x10000>,
+			      <0 0x11f50000 0 0x1000>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>, <&clk26m>;
+			clock-names = "source", "hclk", "source_cg";
+			status = "disabled";
+		};
+
+		mmc1: mmc@11240000 {
+			compatible = "mediatek,mt8195-mmc", "mediatek,mt8192-mmc";
+			reg = <0 0x11240000 0 0x1000>,
+			      <0 0x11c70000 0 0x1000>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>, <&clk26m>;
+			clock-names = "source", "hclk", "source_cg";
+			status = "disabled";
+		};
+
+		nor_flash: nor@1132c000 {
+			compatible = "mediatek,mt8195-nor", "mediatek,mt8173-nor";
+			reg = <0 0x1132c000 0 0x1000>;
+			interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "spi", "sf";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		u3phy2: usb-phy2@11c40000 {
+			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
+			clocks = <&clk26m>;
+			clock-names = "u3phya_ref";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x11c40000 0x700>;
+			status = "disabled";
+
+			u2port2: usb2-phy2@0 {
+				reg = <0x0 0x700>;
+				clocks = <&clk26m>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
+
+		u3phy3: usb-phy3@11c50000 {
+			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
+			clocks = <&clk26m>;
+			clock-names = "u3phya_ref";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x11c50000 0x700>;
+			status = "disabled";
+
+			u2port3: usb2-phy3@0 {
+				reg = <0x0 0x700>;
+				clocks = <&clk26m>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
+
+		u3phy1: usb-phy1@11e30000 {
+			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
+			clocks = <&clk26m>;
+			clock-names = "u3phya_ref";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x11e30000 0xe00>;
+			status = "disabled";
+
+			u2port1: usb2-phy1@0 {
+				reg = <0x0 0x700>;
+				clocks = <&clk26m>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+
+			u3port1: usb3-phy1@700 {
+				reg = <0x700 0x700>;
+				clocks = <&clk26m>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
+
+		u3phy0: usb-phy0@11e40000 {
+			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
+			clocks = <&clk26m>;
+			clock-names = "u3phya_ref";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x11e40000 0xe00>;
+			status = "disabled";
+
+			u2port0: usb2-phy0@0 {
+				reg = <0x0 0x700>;
+				clocks = <&clk26m>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+
+			u3port0: usb3-phy0@700 {
+				reg = <0x700 0x700>;
+				clocks = <&clk26m>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
+
+		ufsphy: phy@11fa0000 {
+			compatible = "mediatek,mt8195-ufsphy", "mediatek,mt8183-ufsphy";
+			reg = <0 0x11fa0000 0 0xc000>;
+			clocks = <&clk26m>, <&clk26m>;
+			clock-names = "unipro", "mp";
+			#phy-cells = <0>;
+		};
+	};
+};
-- 
2.14.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: (subset) [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC
  2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
                   ` (9 preceding siblings ...)
  2021-03-16 11:14 ` [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile Seiya Wang
@ 2021-03-16 17:59 ` Mark Brown
  10 siblings, 0 replies; 20+ messages in thread
From: Mark Brown @ 2021-03-16 17:59 UTC (permalink / raw)
  To: Seiya Wang, Rob Herring, Matthias Brugger
  Cc: Mark Brown, Chuanhong Guo, Hsin-Yi Wang, linux-iio, Bayi Cheng,
	Wim Van Sebroeck, linux-arm-kernel, Chunfeng Yun,
	Thomas Gleixner, Chaotian Jing, linux-serial,
	Kishon Vijay Abraham I, Ulf Hansson, Greg Kroah-Hartman,
	srv_heupstream, linux-mediatek, Fabien Parent, linux-spi,
	Daniel Lezcano, Jonathan Cameron, Wenbin Mei,
	Peter Meerwald-Stadler, Zhiyong Tao, Lars-Peter Clausen,
	linux-mmc, Vinod Koul, Enric Balletbo i Serra, Guenter Roeck,
	devicetree, linux-watchdog, Sean Wang, linux-kernel, Stanley Chu

On Tue, 16 Mar 2021 19:14:33 +0800, Seiya Wang wrote:
> MT8195 is a SoC based on 64bit ARMv8 architecture.
> It contains 4 CA55 and 4 CA78 cores.
> MT8195 share many HW IP with MT65xx series.
> This patchset was tested on MT8195 evaluation board to shell.
> 
> Based on v5.12-rc2
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[05/10] dt-bindings: spi: Add compatible for Mediatek MT8195
        commit: 5ac1b909e5b60cc2735bd9174f631dc2c7f44c5a

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 03/10] dt-bindings: watchdog: Add compatible for Mediatek MT8195
  2021-03-16 11:14 ` [PATCH 03/10] dt-bindings: watchdog: " Seiya Wang
@ 2021-03-16 21:15   ` Guenter Roeck
  0 siblings, 0 replies; 20+ messages in thread
From: Guenter Roeck @ 2021-03-16 21:15 UTC (permalink / raw)
  To: Seiya Wang
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Chunfeng Yun, Kishon Vijay Abraham I, Vinod Koul,
	Greg Kroah-Hartman, Mark Brown, Daniel Lezcano, Thomas Gleixner,
	Wim Van Sebroeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On Tue, Mar 16, 2021 at 07:14:36PM +0800, Seiya Wang wrote:
> This commit adds dt-binding documentation of watchdog for Mediatek MT8195 SoC
> Platform.
> 
> Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

Guenter

> ---
>  Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> index e36ba60de829..a658a0b92b9a 100644
> --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> @@ -13,6 +13,7 @@ Required properties:
>  	"mediatek,mt8183-wdt": for MT8183
>  	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
>  	"mediatek,mt8192-wdt": for MT8192
> +	"mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195
>  
>  - reg : Specifies base physical address and size of the registers.
>  
> -- 
> 2.14.1
> 

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 07/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-16 11:14 ` [PATCH 07/10] dt-bindings: phy: " Seiya Wang
@ 2021-03-17  6:39   ` Vinod Koul
  0 siblings, 0 replies; 20+ messages in thread
From: Vinod Koul @ 2021-03-17  6:39 UTC (permalink / raw)
  To: Seiya Wang
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Chunfeng Yun, Kishon Vijay Abraham I, Greg Kroah-Hartman,
	Mark Brown, Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck,
	Guenter Roeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On 16-03-21, 19:14, Seiya Wang wrote:
> This commit adds dt-binding documentation of T-Phy for Mediatek MT8195 SoC
> Platform.

Applied, thanks

-- 
~Vinod

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 08/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-16 11:14 ` [PATCH 08/10] " Seiya Wang
@ 2021-03-17  6:40   ` Vinod Koul
  2021-03-18  2:33     ` Chunfeng Yun
  2021-03-18  2:19   ` Chunfeng Yun
  1 sibling, 1 reply; 20+ messages in thread
From: Vinod Koul @ 2021-03-17  6:40 UTC (permalink / raw)
  To: Seiya Wang
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Chunfeng Yun, Kishon Vijay Abraham I, Greg Kroah-Hartman,
	Mark Brown, Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck,
	Guenter Roeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On 16-03-21, 19:14, Seiya Wang wrote:
> This commit adds dt-binding documentation of UFS M-Phy for Mediatek MT8195 SoC
> Platform.

Applied, thanks

-- 
~Vinod

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 08/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-16 11:14 ` [PATCH 08/10] " Seiya Wang
  2021-03-17  6:40   ` Vinod Koul
@ 2021-03-18  2:19   ` Chunfeng Yun
  2021-03-18  6:04     ` Seiya Wang
  1 sibling, 1 reply; 20+ messages in thread
From: Chunfeng Yun @ 2021-03-18  2:19 UTC (permalink / raw)
  To: Seiya Wang
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Kishon Vijay Abraham I, Vinod Koul, Greg Kroah-Hartman,
	Mark Brown, Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck,
	Guenter Roeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On Tue, 2021-03-16 at 19:14 +0800, Seiya Wang wrote:
> This commit adds dt-binding documentation of UFS M-Phy for Mediatek MT8195 SoC
> Platform.
> 
> Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
> ---
>  Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
> index 3a9be82e7f13..5235b1a0d188 100644
> --- a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
> @@ -22,6 +22,7 @@ properties:
>      pattern: "^ufs-phy@[0-9a-f]+$"
>  
>    compatible:
> +    enum: mediatek,mt8195-ufsphy
>      const: mediatek,mt8183-ufsphy
>  
There is warning when I make dt_binding_check, if mt8195 is compatible
with mt8183, will add it as following:

    oneOf:
      - items:
          - enum:
              - mediatek,mt8195-ufsphy
          - const: mediatek,mt8183-ufsphy
      - const: mediatek,mt8183-ufsphy

Due to Vinod already apply this patch, I'll send out a fix patch later

Thanks

>    reg:


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 08/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-17  6:40   ` Vinod Koul
@ 2021-03-18  2:33     ` Chunfeng Yun
  0 siblings, 0 replies; 20+ messages in thread
From: Chunfeng Yun @ 2021-03-18  2:33 UTC (permalink / raw)
  To: Vinod Koul
  Cc: Seiya Wang, Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Kishon Vijay Abraham I, Greg Kroah-Hartman, Mark Brown,
	Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck, Guenter Roeck,
	Enric Balletbo i Serra, Hsin-Yi Wang, Fabien Parent, Sean Wang,
	Zhiyong Tao, Chaotian Jing, Wenbin Mei, Stanley Chu, Bayi Cheng,
	Chuanhong Guo, devicetree, linux-kernel, linux-iio, linux-mmc,
	linux-arm-kernel, linux-mediatek, linux-serial, linux-spi,
	linux-watchdog, srv_heupstream

Hi Vinod,

On Wed, 2021-03-17 at 12:10 +0530, Vinod Koul wrote:
> On 16-03-21, 19:14, Seiya Wang wrote:
> > This commit adds dt-binding documentation of UFS M-Phy for Mediatek MT8195 SoC
> > Platform.
> 
> Applied, thanks

Usually, we expect the dt-binding patch is acked or reviewed by Rob
before it's applied?

Thanks a lot

> 


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile
  2021-03-16 11:14 ` [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile Seiya Wang
@ 2021-03-18  2:57   ` Chunfeng Yun
  2021-03-18  6:03     ` Seiya Wang
  0 siblings, 1 reply; 20+ messages in thread
From: Chunfeng Yun @ 2021-03-18  2:57 UTC (permalink / raw)
  To: Seiya Wang
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Kishon Vijay Abraham I, Vinod Koul, Greg Kroah-Hartman,
	Mark Brown, Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck,
	Guenter Roeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On Tue, 2021-03-16 at 19:14 +0800, Seiya Wang wrote:
> Add basic chip support for Mediatek MT8195
> 
> Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/Makefile       |   1 +
>  arch/arm64/boot/dts/mediatek/mt8195-evb.dts |  29 ++
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi    | 477 ++++++++++++++++++++++++++++
>  3 files changed, 507 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi
> 
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index deba27ab7657..aee4b9715d2f 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -16,4 +16,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> new file mode 100644
> index 000000000000..82bb10e9a531
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> @@ -0,0 +1,29 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 MediaTek Inc.
> + * Author: Seiya Wang <seiya.wang@mediatek.com>
> + */
> +/dts-v1/;
> +#include "mt8195.dtsi"
> +
> +/ {
> +	model = "MediaTek MT8195 evaluation board";
> +	compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
> +
> +	aliases {
> +		serial0 = &uart0;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:921600n8";
> +	};
> +
> +	memory@40000000 {
> +		device_type = "memory";
> +		reg = <0 0x40000000 0 0x80000000>;
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> new file mode 100644
> index 000000000000..356583fe4f03
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -0,0 +1,477 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Seiya Wang <seiya.wang@mediatek.com>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> +	compatible = "mediatek,mt8195";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	clocks {
> +		clk26m: oscillator0 {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <26000000>;
> +			clock-output-names = "clk26m";
> +		};
> +
> +		clk32k: oscillator1 {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <32768>;
> +			clock-output-names = "clk32k";
> +		};
> +	};
[...]
> +
> +		nor_flash: nor@1132c000 {
> +			compatible = "mediatek,mt8195-nor", "mediatek,mt8173-nor";
> +			reg = <0 0x1132c000 0 0x1000>;
> +			interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&clk26m>, <&clk26m>;
> +			clock-names = "spi", "sf";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		u3phy2: usb-phy2@11c40000 {
use t-phy instead of usb-phy2

It's better to run dtbs_check for this patch

> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
No need clocks for v2
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11c40000 0x700>;
> +			status = "disabled";
> +
> +			u2port2: usb2-phy2@0 {
use usb-phy instead of usb2-phy2

> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
I think no need disable it
it's parent node is already disabled. if enable parent node,
we also want to enable all children at the same time.

> +			};
> +		};
> +
> +		u3phy3: usb-phy3@11c50000 {
t-phy@...
> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
No need clocks
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11c50000 0x700>;
> +			status = "disabled";
> +
> +			u2port3: usb2-phy3@0 {
use usb-phy
> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +		};
> +
> +		u3phy1: usb-phy1@11e30000 {
t-phy
> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
remove clocks*
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11e30000 0xe00>;
> +			status = "disabled";
> +
> +			u2port1: usb2-phy1@0 {
usb-phy
> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +
> +			u3port1: usb3-phy1@700 {
usb-phy
> +				reg = <0x700 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +		};
> +
> +		u3phy0: usb-phy0@11e40000 {
t-phy
> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
remove clocks*
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11e40000 0xe00>;
> +			status = "disabled";
> +
> +			u2port0: usb2-phy0@0 {
usb-phy
> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +
> +			u3port0: usb3-phy0@700 {
usb-phy
> +				reg = <0x700 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +		};
> +
> +		ufsphy: phy@11fa0000 {
usf-phy instead of phy
> +			compatible = "mediatek,mt8195-ufsphy", "mediatek,mt8183-ufsphy";
> +			reg = <0 0x11fa0000 0 0xc000>;
> +			clocks = <&clk26m>, <&clk26m>;
> +			clock-names = "unipro", "mp";
> +			#phy-cells = <0>;
disabled?

Thanks a lot

> +		};
> +	};
> +};


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile
  2021-03-18  2:57   ` Chunfeng Yun
@ 2021-03-18  6:03     ` Seiya Wang
  0 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-18  6:03 UTC (permalink / raw)
  To: Chunfeng Yun
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Kishon Vijay Abraham I, Vinod Koul, Greg Kroah-Hartman,
	Mark Brown, Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck,
	Guenter Roeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On Thu, 2021-03-18 at 10:57 +0800, Chunfeng Yun wrote:
> On Tue, 2021-03-16 at 19:14 +0800, Seiya Wang wrote:
> > Add basic chip support for Mediatek MT8195
> > 
> > Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
> > ---
> >  arch/arm64/boot/dts/mediatek/Makefile       |   1 +
> >  arch/arm64/boot/dts/mediatek/mt8195-evb.dts |  29 ++
> >  arch/arm64/boot/dts/mediatek/mt8195.dtsi    | 477 ++++++++++++++++++++++++++++
> >  3 files changed, 507 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> > index deba27ab7657..aee4b9715d2f 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -16,4 +16,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> > new file mode 100644
> > index 000000000000..82bb10e9a531
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> > @@ -0,0 +1,29 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (C) 2021 MediaTek Inc.
> > + * Author: Seiya Wang <seiya.wang@mediatek.com>
> > + */
> > +/dts-v1/;
> > +#include "mt8195.dtsi"
> > +
> > +/ {
> > +	model = "MediaTek MT8195 evaluation board";
> > +	compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
> > +
> > +	aliases {
> > +		serial0 = &uart0;
> > +	};
> > +
> > +	chosen {
> > +		stdout-path = "serial0:921600n8";
> > +	};
> > +
> > +	memory@40000000 {
> > +		device_type = "memory";
> > +		reg = <0 0x40000000 0 0x80000000>;
> > +	};
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > new file mode 100644
> > index 000000000000..356583fe4f03
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > @@ -0,0 +1,477 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (c) 2021 MediaTek Inc.
> > + * Author: Seiya Wang <seiya.wang@mediatek.com>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +/ {
> > +	compatible = "mediatek,mt8195";
> > +	interrupt-parent = <&gic>;
> > +	#address-cells = <2>;
> > +	#size-cells = <2>;
> > +
> > +	clocks {
> > +		clk26m: oscillator0 {
> > +			compatible = "fixed-clock";
> > +			#clock-cells = <0>;
> > +			clock-frequency = <26000000>;
> > +			clock-output-names = "clk26m";
> > +		};
> > +
> > +		clk32k: oscillator1 {
> > +			compatible = "fixed-clock";
> > +			#clock-cells = <0>;
> > +			clock-frequency = <32768>;
> > +			clock-output-names = "clk32k";
> > +		};
> > +	};
> [...]
> > +
> > +		nor_flash: nor@1132c000 {
> > +			compatible = "mediatek,mt8195-nor", "mediatek,mt8173-nor";
> > +			reg = <0 0x1132c000 0 0x1000>;
> > +			interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
> > +			clocks = <&clk26m>, <&clk26m>;
> > +			clock-names = "spi", "sf";
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> > +		u3phy2: usb-phy2@11c40000 {
> use t-phy instead of usb-phy2
> 
> It's better to run dtbs_check for this patch
> 
> > +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> > +			clocks = <&clk26m>;
> > +			clock-names = "u3phya_ref";
> No need clocks for v2
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges = <0 0 0x11c40000 0x700>;
> > +			status = "disabled";
> > +
> > +			u2port2: usb2-phy2@0 {
> use usb-phy instead of usb2-phy2
> 
> > +				reg = <0x0 0x700>;
> > +				clocks = <&clk26m>;
> > +				clock-names = "ref";
> > +				#phy-cells = <1>;
> > +				status = "disabled";
> I think no need disable it
> it's parent node is already disabled. if enable parent node,
> we also want to enable all children at the same time.
> 
> > +			};
> > +		};
> > +
> > +		u3phy3: usb-phy3@11c50000 {
> t-phy@...
> > +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> > +			clocks = <&clk26m>;
> > +			clock-names = "u3phya_ref";
> No need clocks
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges = <0 0 0x11c50000 0x700>;
> > +			status = "disabled";
> > +
> > +			u2port3: usb2-phy3@0 {
> use usb-phy
> > +				reg = <0x0 0x700>;
> > +				clocks = <&clk26m>;
> > +				clock-names = "ref";
> > +				#phy-cells = <1>;
> > +				status = "disabled";
> remove status
> > +			};
> > +		};
> > +
> > +		u3phy1: usb-phy1@11e30000 {
> t-phy
> > +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> > +			clocks = <&clk26m>;
> > +			clock-names = "u3phya_ref";
> remove clocks*
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges = <0 0 0x11e30000 0xe00>;
> > +			status = "disabled";
> > +
> > +			u2port1: usb2-phy1@0 {
> usb-phy
> > +				reg = <0x0 0x700>;
> > +				clocks = <&clk26m>;
> > +				clock-names = "ref";
> > +				#phy-cells = <1>;
> > +				status = "disabled";
> remove status
> > +			};
> > +
> > +			u3port1: usb3-phy1@700 {
> usb-phy
> > +				reg = <0x700 0x700>;
> > +				clocks = <&clk26m>;
> > +				clock-names = "ref";
> > +				#phy-cells = <1>;
> > +				status = "disabled";
> remove status
> > +			};
> > +		};
> > +
> > +		u3phy0: usb-phy0@11e40000 {
> t-phy
> > +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> > +			clocks = <&clk26m>;
> > +			clock-names = "u3phya_ref";
> remove clocks*
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges = <0 0 0x11e40000 0xe00>;
> > +			status = "disabled";
> > +
> > +			u2port0: usb2-phy0@0 {
> usb-phy
> > +				reg = <0x0 0x700>;
> > +				clocks = <&clk26m>;
> > +				clock-names = "ref";
> > +				#phy-cells = <1>;
> > +				status = "disabled";
> remove status
> > +			};
> > +
> > +			u3port0: usb3-phy0@700 {
> usb-phy
> > +				reg = <0x700 0x700>;
> > +				clocks = <&clk26m>;
> > +				clock-names = "ref";
> > +				#phy-cells = <1>;
> > +				status = "disabled";
> remove status
> > +			};
> > +		};
> > +
> > +		ufsphy: phy@11fa0000 {
> usf-phy instead of phy
> > +			compatible = "mediatek,mt8195-ufsphy", "mediatek,mt8183-ufsphy";
> > +			reg = <0 0x11fa0000 0 0xc000>;
> > +			clocks = <&clk26m>, <&clk26m>;
> > +			clock-names = "unipro", "mp";
> > +			#phy-cells = <0>;
> disabled?
> 
> Thanks a lot

I will update the patch after a new linux-next tag available.
Thank you very much.

> > +		};
> > +	};
> > +};
> 
> 


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 08/10] dt-bindings: phy: Add compatible for Mediatek MT8195
  2021-03-18  2:19   ` Chunfeng Yun
@ 2021-03-18  6:04     ` Seiya Wang
  0 siblings, 0 replies; 20+ messages in thread
From: Seiya Wang @ 2021-03-18  6:04 UTC (permalink / raw)
  To: Chunfeng Yun
  Cc: Rob Herring, Matthias Brugger, Jonathan Cameron,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Ulf Hansson,
	Kishon Vijay Abraham I, Vinod Koul, Greg Kroah-Hartman,
	Mark Brown, Daniel Lezcano, Thomas Gleixner, Wim Van Sebroeck,
	Guenter Roeck, Enric Balletbo i Serra, Hsin-Yi Wang,
	Fabien Parent, Sean Wang, Zhiyong Tao, Chaotian Jing, Wenbin Mei,
	Stanley Chu, Bayi Cheng, Chuanhong Guo, devicetree, linux-kernel,
	linux-iio, linux-mmc, linux-arm-kernel, linux-mediatek,
	linux-serial, linux-spi, linux-watchdog, srv_heupstream

On Thu, 2021-03-18 at 10:19 +0800, Chunfeng Yun wrote:
> On Tue, 2021-03-16 at 19:14 +0800, Seiya Wang wrote:
> > This commit adds dt-binding documentation of UFS M-Phy for Mediatek MT8195 SoC
> > Platform.
> > 
> > Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
> > ---
> >  Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
> > index 3a9be82e7f13..5235b1a0d188 100644
> > --- a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
> > @@ -22,6 +22,7 @@ properties:
> >      pattern: "^ufs-phy@[0-9a-f]+$"
> >  
> >    compatible:
> > +    enum: mediatek,mt8195-ufsphy
> >      const: mediatek,mt8183-ufsphy
> >  
> There is warning when I make dt_binding_check, if mt8195 is compatible
> with mt8183, will add it as following:
> 
>     oneOf:
>       - items:
>           - enum:
>               - mediatek,mt8195-ufsphy
>           - const: mediatek,mt8183-ufsphy
>       - const: mediatek,mt8183-ufsphy
> 
> Due to Vinod already apply this patch, I'll send out a fix patch later
> 
> Thanks

I will update the patch after a new linux-next tag available.
Thank you very much.

> >    reg:
> 
> 


^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, back to index

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-16 11:14 [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Seiya Wang
2021-03-16 11:14 ` [PATCH 01/10] dt-bindings: timer: Add compatible for Mediatek MT8195 Seiya Wang
2021-03-16 11:14 ` [PATCH 02/10] dt-bindings: serial: " Seiya Wang
2021-03-16 11:14 ` [PATCH 03/10] dt-bindings: watchdog: " Seiya Wang
2021-03-16 21:15   ` Guenter Roeck
2021-03-16 11:14 ` [PATCH 04/10] dt-bindings: mmc: " Seiya Wang
2021-03-16 11:14 ` [PATCH 05/10] dt-bindings: spi: " Seiya Wang
2021-03-16 11:14 ` [PATCH 06/10] dt-bindings: iio: adc: " Seiya Wang
2021-03-16 11:14 ` [PATCH 07/10] dt-bindings: phy: " Seiya Wang
2021-03-17  6:39   ` Vinod Koul
2021-03-16 11:14 ` [PATCH 08/10] " Seiya Wang
2021-03-17  6:40   ` Vinod Koul
2021-03-18  2:33     ` Chunfeng Yun
2021-03-18  2:19   ` Chunfeng Yun
2021-03-18  6:04     ` Seiya Wang
2021-03-16 11:14 ` [PATCH 09/10] dt-bindings: arm: " Seiya Wang
2021-03-16 11:14 ` [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile Seiya Wang
2021-03-18  2:57   ` Chunfeng Yun
2021-03-18  6:03     ` Seiya Wang
2021-03-16 17:59 ` (subset) [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Mark Brown

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