From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02C24C4360C for ; Fri, 4 Oct 2019 10:33:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D77FF215EA for ; Fri, 4 Oct 2019 10:33:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387410AbfJDKdT (ORCPT ); Fri, 4 Oct 2019 06:33:19 -0400 Received: from foss.arm.com ([217.140.110.172]:41204 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729908AbfJDKdS (ORCPT ); Fri, 4 Oct 2019 06:33:18 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C038615AB; Fri, 4 Oct 2019 03:33:17 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2130B3F706; Fri, 4 Oct 2019 03:33:17 -0700 (PDT) Date: Fri, 4 Oct 2019 11:33:15 +0100 From: Andrew Murray To: Fabrizio Castro Cc: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: Re: [PATCH 3/7] dt-bindings: PCI: rcar: Add device tree support for r8a774b1 Message-ID: <20191004103315.GS42880@e119886-lin.cambridge.arm.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> <1570178133-21532-4-git-send-email-fabrizio.castro@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1570178133-21532-4-git-send-email-fabrizio.castro@bp.renesas.com> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org On Fri, Oct 04, 2019 at 09:35:29AM +0100, Fabrizio Castro wrote: > Add PCIe support for the RZ/G2N (a.k.a. R8A774B1). > > Signed-off-by: Fabrizio Castro > --- > Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt > index 45bba9f..12702c8 100644 > --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt > +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt > @@ -4,6 +4,7 @@ Required properties: > compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; > "renesas,pcie-r8a7744" for the R8A7744 SoC; > "renesas,pcie-r8a774a1" for the R8A774A1 SoC; > + "renesas,pcie-r8a774b1" for the R8A774B1 SoC; Reviewed-by: Andrew Murray > "renesas,pcie-r8a774c0" for the R8A774C0 SoC; > "renesas,pcie-r8a7779" for the R8A7779 SoC; > "renesas,pcie-r8a7790" for the R8A7790 SoC; > -- > 2.7.4 >