From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E82A9C433B4 for ; Wed, 12 May 2021 08:48:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B09F961352 for ; Wed, 12 May 2021 08:48:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231301AbhELItM (ORCPT ); Wed, 12 May 2021 04:49:12 -0400 Received: from mga09.intel.com ([134.134.136.24]:31193 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231302AbhELItJ (ORCPT ); Wed, 12 May 2021 04:49:09 -0400 IronPort-SDR: rwze3kbE0OVnwc4qGaT1QGRYebLKyuOf0z2Ve68GpIz5fep1GjYc/IsU1SgZQK4wHrua2Q1K/P MW357ji22fZw== X-IronPort-AV: E=McAfee;i="6200,9189,9981"; a="199709115" X-IronPort-AV: E=Sophos;i="5.82,293,1613462400"; d="scan'208";a="199709115" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2021 01:48:02 -0700 IronPort-SDR: USB4gkcgyNkJ+83TZ0TVYTZDF9EeI0jZiqXExhQtEswNTLWyMtWe0VqtG8mbWSJwp3t1ItiLK8 yRVinuNXaFCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,293,1613462400"; d="scan'208";a="435106539" Received: from bspteam04.iind.intel.com ([10.106.46.142]) by fmsmga008.fm.intel.com with ESMTP; 12 May 2021 01:47:59 -0700 From: shruthi.sanil@intel.com To: wim@linux-watchdog.org, linux@roeck-us.net, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org Cc: andriy.shevchenko@linux.intel.com, kris.pan@linux.intel.com, mgross@linux.intel.com, srikanth.thokala@intel.com, lakshmi.bai.raja.subramanian@intel.com, mallikarjunappa.sangannavar@intel.com, shruthi.sanil@intel.com Subject: [PATCH 09/10] watchdog: keembay: WDT SMC handler MACRO name update Date: Wed, 12 May 2021 14:17:23 +0530 Message-Id: <20210512084724.14634-10-shruthi.sanil@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210512084724.14634-1-shruthi.sanil@intel.com> References: <20210512084724.14634-1-shruthi.sanil@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Shruthi Sanil Updated the WDT SMC handler MACRO name to make it clear that its a ARM SMC handler that helps in clearing the WDT interrupt bit. Tested-by: Kris Pan Signed-off-by: Shruthi Sanil --- drivers/watchdog/keembay_wdt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/watchdog/keembay_wdt.c b/drivers/watchdog/keembay_wdt.c index 63a7c5d719a3..0a8cf5b35699 100644 --- a/drivers/watchdog/keembay_wdt.c +++ b/drivers/watchdog/keembay_wdt.c @@ -25,7 +25,7 @@ #define WDT_TH_INT_MASK BIT(8) #define WDT_TO_INT_MASK BIT(9) -#define WDT_ISR_CLEAR 0x8200ff18 +#define WDT_INT_CLEAR_SMC 0x8200ff18 #define WDT_UNLOCK 0xf1d0dead #define WDT_DISABLE 0x0 #define WDT_ENABLE 0x1 @@ -143,7 +143,7 @@ static irqreturn_t keembay_wdt_to_isr(int irq, void *dev_id) struct keembay_wdt *wdt = dev_id; struct arm_smccc_res res; - arm_smccc_smc(WDT_ISR_CLEAR, WDT_TO_INT_MASK, 0, 0, 0, 0, 0, 0, &res); + arm_smccc_smc(WDT_INT_CLEAR_SMC, WDT_TO_INT_MASK, 0, 0, 0, 0, 0, 0, &res); dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt timeout.\n"); emergency_restart(); @@ -157,7 +157,7 @@ static irqreturn_t keembay_wdt_th_isr(int irq, void *dev_id) keembay_wdt_set_pretimeout(&wdt->wdd, 0x0); - arm_smccc_smc(WDT_ISR_CLEAR, WDT_TH_INT_MASK, 0, 0, 0, 0, 0, 0, &res); + arm_smccc_smc(WDT_INT_CLEAR_SMC, WDT_TH_INT_MASK, 0, 0, 0, 0, 0, 0, &res); dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt pre-timeout.\n"); watchdog_notify_pretimeout(&wdt->wdd); -- 2.17.1