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* [v5,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document
       [not found] <20210628113730.26107-1-Christine.Zhu@mediatek.com>
@ 2021-06-28 11:37 ` Christine Zhu
  2021-07-14  1:56   ` Rob Herring
  2021-06-28 11:37 ` [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file Christine Zhu
  2021-06-28 11:37 ` [v5,3/3] watchdog: mediatek: mt8195: add wdt support Christine Zhu
  2 siblings, 1 reply; 8+ messages in thread
From: Christine Zhu @ 2021-06-28 11:37 UTC (permalink / raw)
  To: wim, linux, robh+dt, matthias.bgg
  Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
	linux-watchdog, devicetree, seiya.wang, Christine Zhu

From: "Christine Zhu" <Christine.Zhu@mediatek.com>

Update mtk-wdt document for MT8195 platform.

Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
---
 Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
index e36ba60de829..d15a321b22bc 100644
--- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
@@ -13,6 +13,7 @@ Required properties:
 	"mediatek,mt8183-wdt": for MT8183
 	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
 	"mediatek,mt8192-wdt": for MT8192
+	"mediatek,mt8195-wdt": for MT8195
 
 - reg : Specifies base physical address and size of the registers.
 
-- 
2.18.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file
       [not found] <20210628113730.26107-1-Christine.Zhu@mediatek.com>
  2021-06-28 11:37 ` [v5,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document Christine Zhu
@ 2021-06-28 11:37 ` Christine Zhu
  2021-07-14  1:58   ` Rob Herring
  2021-07-30  5:09   ` Guenter Roeck
  2021-06-28 11:37 ` [v5,3/3] watchdog: mediatek: mt8195: add wdt support Christine Zhu
  2 siblings, 2 replies; 8+ messages in thread
From: Christine Zhu @ 2021-06-28 11:37 UTC (permalink / raw)
  To: wim, linux, robh+dt, matthias.bgg
  Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
	linux-watchdog, devicetree, seiya.wang, Christine Zhu

From: "Christine Zhu" <Christine.Zhu@mediatek.com>

Add toprgu reset-controller head file for MT8195 platform.

Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
---
 .../reset-controller/mt8195-resets.h          | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 include/dt-bindings/reset-controller/mt8195-resets.h

diff --git a/include/dt-bindings/reset-controller/mt8195-resets.h b/include/dt-bindings/reset-controller/mt8195-resets.h
new file mode 100644
index 000000000000..7ec27a64afc7
--- /dev/null
+++ b/include/dt-bindings/reset-controller/mt8195-resets.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Crystal Guo <crystal.guo@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
+
+#define MT8195_TOPRGU_CONN_MCU_SW_RST          0
+#define MT8195_TOPRGU_INFRA_GRST_SW_RST        1
+#define MT8195_TOPRGU_APU_SW_RST               2
+#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST     6
+#define MT8195_TOPRGU_MMSYS_SW_RST             7
+#define MT8195_TOPRGU_MFG_SW_RST               8
+#define MT8195_TOPRGU_VENC_SW_RST              9
+#define MT8195_TOPRGU_VDEC_SW_RST              10
+#define MT8195_TOPRGU_IMG_SW_RST               11
+#define MT8195_TOPRGU_APMIXEDSYS_SW_RST        13
+#define MT8195_TOPRGU_AUDIO_SW_RST             14
+#define MT8195_TOPRGU_CAMSYS_SW_RST            15
+#define MT8195_TOPRGU_EDPTX_SW_RST             16
+#define MT8195_TOPRGU_ADSPSYS_SW_RST           21
+#define MT8195_TOPRGU_DPTX_SW_RST              22
+#define MT8195_TOPRGU_SPMI_MST_SW_RST          23
+
+#define MT8195_TOPRGU_SW_RST_NUM               16
+
+#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
-- 
2.18.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [v5,3/3] watchdog: mediatek: mt8195: add wdt support
       [not found] <20210628113730.26107-1-Christine.Zhu@mediatek.com>
  2021-06-28 11:37 ` [v5,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document Christine Zhu
  2021-06-28 11:37 ` [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file Christine Zhu
@ 2021-06-28 11:37 ` Christine Zhu
  2021-06-28 16:33   ` Guenter Roeck
  2021-06-29  2:13   ` Tzung-Bi Shih
  2 siblings, 2 replies; 8+ messages in thread
From: Christine Zhu @ 2021-06-28 11:37 UTC (permalink / raw)
  To: wim, linux, robh+dt, matthias.bgg
  Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
	linux-watchdog, devicetree, seiya.wang, Christine Zhu

From: "Christine Zhu" <Christine.Zhu@mediatek.com>

Support MT8195 watchdog device.

Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
---
 drivers/watchdog/mtk_wdt.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 97ca993bd009..8231cb9cf5f9 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -12,6 +12,7 @@
 #include <dt-bindings/reset-controller/mt2712-resets.h>
 #include <dt-bindings/reset-controller/mt8183-resets.h>
 #include <dt-bindings/reset-controller/mt8192-resets.h>
+#include <dt-bindings/reset-controller/mt8195-resets.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/init.h>
@@ -81,6 +82,10 @@ static const struct mtk_wdt_data mt8192_data = {
 	.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
 };
 
+static const struct mtk_wdt_data mt8195_data = {
+	.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
+};
+
 static int toprgu_reset_update(struct reset_controller_dev *rcdev,
 			       unsigned long id, bool assert)
 {
@@ -341,6 +346,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
 	{ .compatible = "mediatek,mt6589-wdt" },
 	{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
 	{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
+	{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
-- 
2.18.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [v5,3/3] watchdog: mediatek: mt8195: add wdt support
  2021-06-28 11:37 ` [v5,3/3] watchdog: mediatek: mt8195: add wdt support Christine Zhu
@ 2021-06-28 16:33   ` Guenter Roeck
  2021-06-29  2:13   ` Tzung-Bi Shih
  1 sibling, 0 replies; 8+ messages in thread
From: Guenter Roeck @ 2021-06-28 16:33 UTC (permalink / raw)
  To: Christine Zhu
  Cc: wim, robh+dt, matthias.bgg, srv_heupstream, linux-mediatek,
	linux-arm-kernel, linux-kernel, linux-watchdog, devicetree,
	seiya.wang

On Mon, Jun 28, 2021 at 07:37:31PM +0800, Christine Zhu wrote:
> From: "Christine Zhu" <Christine.Zhu@mediatek.com>
> 
> Support MT8195 watchdog device.
> 
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>  drivers/watchdog/mtk_wdt.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index 97ca993bd009..8231cb9cf5f9 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/reset-controller/mt2712-resets.h>
>  #include <dt-bindings/reset-controller/mt8183-resets.h>
>  #include <dt-bindings/reset-controller/mt8192-resets.h>
> +#include <dt-bindings/reset-controller/mt8195-resets.h>
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/init.h>
> @@ -81,6 +82,10 @@ static const struct mtk_wdt_data mt8192_data = {
>  	.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
>  };
>  
> +static const struct mtk_wdt_data mt8195_data = {
> +	.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
> +};
> +
>  static int toprgu_reset_update(struct reset_controller_dev *rcdev,
>  			       unsigned long id, bool assert)
>  {
> @@ -341,6 +346,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
>  	{ .compatible = "mediatek,mt6589-wdt" },
>  	{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
>  	{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
> +	{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
> -- 
> 2.18.0
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [v5,3/3] watchdog: mediatek: mt8195: add wdt support
  2021-06-28 11:37 ` [v5,3/3] watchdog: mediatek: mt8195: add wdt support Christine Zhu
  2021-06-28 16:33   ` Guenter Roeck
@ 2021-06-29  2:13   ` Tzung-Bi Shih
  1 sibling, 0 replies; 8+ messages in thread
From: Tzung-Bi Shih @ 2021-06-29  2:13 UTC (permalink / raw)
  To: Christine Zhu
  Cc: wim, linux, robh+dt, matthias.bgg, srv_heupstream,
	linux-mediatek, linux-arm-kernel, linux-kernel, linux-watchdog,
	devicetree, seiya.wang

On Mon, Jun 28, 2021 at 7:39 PM Christine Zhu
<Christine.Zhu@mediatek.com> wrote:
>
> From: "Christine Zhu" <Christine.Zhu@mediatek.com>
>
> Support MT8195 watchdog device.
>
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>

Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [v5,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document
  2021-06-28 11:37 ` [v5,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document Christine Zhu
@ 2021-07-14  1:56   ` Rob Herring
  0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-07-14  1:56 UTC (permalink / raw)
  To: Christine Zhu
  Cc: matthias.bgg, linux-watchdog, srv_heupstream, linux, seiya.wang,
	linux-mediatek, robh+dt, linux-arm-kernel, wim, linux-kernel,
	devicetree

On Mon, 28 Jun 2021 19:37:29 +0800, Christine Zhu wrote:
> From: "Christine Zhu" <Christine.Zhu@mediatek.com>
> 
> Update mtk-wdt document for MT8195 platform.
> 
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> ---
>  Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file
  2021-06-28 11:37 ` [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file Christine Zhu
@ 2021-07-14  1:58   ` Rob Herring
  2021-07-30  5:09   ` Guenter Roeck
  1 sibling, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-07-14  1:58 UTC (permalink / raw)
  To: Christine Zhu
  Cc: wim, linux, matthias.bgg, srv_heupstream, linux-mediatek,
	linux-arm-kernel, linux-kernel, linux-watchdog, devicetree,
	seiya.wang

On Mon, Jun 28, 2021 at 07:37:30PM +0800, Christine Zhu wrote:
> From: "Christine Zhu" <Christine.Zhu@mediatek.com>
> 
> Add toprgu reset-controller head file for MT8195 platform.

s/head/header/

And the subject too.

> 
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> ---
>  .../reset-controller/mt8195-resets.h          | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 include/dt-bindings/reset-controller/mt8195-resets.h
> 
> diff --git a/include/dt-bindings/reset-controller/mt8195-resets.h b/include/dt-bindings/reset-controller/mt8195-resets.h
> new file mode 100644
> index 000000000000..7ec27a64afc7
> --- /dev/null
> +++ b/include/dt-bindings/reset-controller/mt8195-resets.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: GPL-2.0 */

Dual license please.

> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Crystal Guo <crystal.guo@mediatek.com>

According to the S-o-b and patch author, you are the author.

> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +
> +#define MT8195_TOPRGU_CONN_MCU_SW_RST          0
> +#define MT8195_TOPRGU_INFRA_GRST_SW_RST        1
> +#define MT8195_TOPRGU_APU_SW_RST               2
> +#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST     6
> +#define MT8195_TOPRGU_MMSYS_SW_RST             7
> +#define MT8195_TOPRGU_MFG_SW_RST               8
> +#define MT8195_TOPRGU_VENC_SW_RST              9
> +#define MT8195_TOPRGU_VDEC_SW_RST              10
> +#define MT8195_TOPRGU_IMG_SW_RST               11
> +#define MT8195_TOPRGU_APMIXEDSYS_SW_RST        13
> +#define MT8195_TOPRGU_AUDIO_SW_RST             14
> +#define MT8195_TOPRGU_CAMSYS_SW_RST            15
> +#define MT8195_TOPRGU_EDPTX_SW_RST             16
> +#define MT8195_TOPRGU_ADSPSYS_SW_RST           21
> +#define MT8195_TOPRGU_DPTX_SW_RST              22
> +#define MT8195_TOPRGU_SPMI_MST_SW_RST          23
> +
> +#define MT8195_TOPRGU_SW_RST_NUM               16
> +
> +#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
> -- 
> 2.18.0
> 
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file
  2021-06-28 11:37 ` [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file Christine Zhu
  2021-07-14  1:58   ` Rob Herring
@ 2021-07-30  5:09   ` Guenter Roeck
  1 sibling, 0 replies; 8+ messages in thread
From: Guenter Roeck @ 2021-07-30  5:09 UTC (permalink / raw)
  To: Christine Zhu
  Cc: wim, robh+dt, matthias.bgg, srv_heupstream, linux-mediatek,
	linux-arm-kernel, linux-kernel, linux-watchdog, devicetree,
	seiya.wang, Enric Balletbo i Serra

On Mon, Jun 28, 2021 at 07:37:30PM +0800, Christine Zhu wrote:
> From: "Christine Zhu" <Christine.Zhu@mediatek.com>
> 
> Add toprgu reset-controller head file for MT8195 platform.
> 
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> ---
>  .../reset-controller/mt8195-resets.h          | 29 +++++++++++++++++++

There is another patch pending which moves the mtk reset controller
include files to another directory. See [1]. Maybe it would make
sense to use the same directory for this file ?

Thanks,
Guenter

>  1 file changed, 29 insertions(+)
>  create mode 100644 include/dt-bindings/reset-controller/mt8195-resets.h
> 
> diff --git a/include/dt-bindings/reset-controller/mt8195-resets.h b/include/dt-bindings/reset-controller/mt8195-resets.h
> new file mode 100644
> index 000000000000..7ec27a64afc7
> --- /dev/null
> +++ b/include/dt-bindings/reset-controller/mt8195-resets.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Crystal Guo <crystal.guo@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +
> +#define MT8195_TOPRGU_CONN_MCU_SW_RST          0
> +#define MT8195_TOPRGU_INFRA_GRST_SW_RST        1
> +#define MT8195_TOPRGU_APU_SW_RST               2
> +#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST     6
> +#define MT8195_TOPRGU_MMSYS_SW_RST             7
> +#define MT8195_TOPRGU_MFG_SW_RST               8
> +#define MT8195_TOPRGU_VENC_SW_RST              9
> +#define MT8195_TOPRGU_VDEC_SW_RST              10
> +#define MT8195_TOPRGU_IMG_SW_RST               11
> +#define MT8195_TOPRGU_APMIXEDSYS_SW_RST        13
> +#define MT8195_TOPRGU_AUDIO_SW_RST             14
> +#define MT8195_TOPRGU_CAMSYS_SW_RST            15
> +#define MT8195_TOPRGU_EDPTX_SW_RST             16
> +#define MT8195_TOPRGU_ADSPSYS_SW_RST           21
> +#define MT8195_TOPRGU_DPTX_SW_RST              22
> +#define MT8195_TOPRGU_SPMI_MST_SW_RST          23
> +
> +#define MT8195_TOPRGU_SW_RST_NUM               16
> +
> +#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */

[1] https://patchwork.kernel.org/project/linux-watchdog/patch/20210714121116.v2.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid/


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-07-30  5:09 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <20210628113730.26107-1-Christine.Zhu@mediatek.com>
2021-06-28 11:37 ` [v5,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document Christine Zhu
2021-07-14  1:56   ` Rob Herring
2021-06-28 11:37 ` [v5,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller head file Christine Zhu
2021-07-14  1:58   ` Rob Herring
2021-07-30  5:09   ` Guenter Roeck
2021-06-28 11:37 ` [v5,3/3] watchdog: mediatek: mt8195: add wdt support Christine Zhu
2021-06-28 16:33   ` Guenter Roeck
2021-06-29  2:13   ` Tzung-Bi Shih

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