From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5565C49EA2 for ; Fri, 18 Jun 2021 07:02:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 94DAB613BD for ; Fri, 18 Jun 2021 07:02:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232199AbhFRHEf (ORCPT ); Fri, 18 Jun 2021 03:04:35 -0400 Received: from gloria.sntech.de ([185.11.138.130]:41946 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231826AbhFRHEe (ORCPT ); Fri, 18 Jun 2021 03:04:34 -0400 Received: from ip5f5aa64a.dynamic.kabel-deutschland.de ([95.90.166.74] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lu8Vs-00006s-P5; Fri, 18 Jun 2021 09:02:00 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: cl , "jay.xu@rock-chips.com" Cc: robh+dt , jagan , wens , uwe , mail , Johan Jonker , linux-arm-kernel , "open list:ARM/Rockchip SoC..." , Linux Kernel Mailing List , jensenhuang , michael , cnsztl , devicetree , "ulf. hansson" , linux-mmc , gregkh , linux-serial , linux-i2c , =?utf-8?B?5p6X5rabKOW6leWxguW5s+WPsCk=?= , =?utf-8?B?5ZC06L6+6LaF?= , zhangqing , Tao Huang , cl , wim , linux , jamie , linux-watchdog , maz Subject: Re: [RESEND PATCH v4 06/10] dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank Date: Fri, 18 Jun 2021 09:01:59 +0200 Message-ID: <3493815.vrqWZg68TM@diego> In-Reply-To: <2021061814414460293612@rock-chips.com> References: <20210429081151.17558-1-cl@rock-chips.com> <5026524.44csPzL39Z@phil> <2021061814414460293612@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Hi Jay, Am Freitag, 18. Juni 2021, 08:41:45 CEST schrieb jay.xu@rock-chips.com: > Hi Heiko > > -------------- > jay.xu@rock-chips.com > >Hi, > > > >Am Donnerstag, 13. Mai 2021, 08:46:06 CEST schrieb cl@rock-chips.com: > >> From: Liang Chen > >> > >> The clock property need 2 items on some rockchip chips. > >> > >> Signed-off-by: Liang Chen > > > >this patch should definitly move over to Jianquns gpio driver series, > >as it introduces the usage of these new clocks. > > > >Also while the single-clock variant definitly doesn't need it, > >I think we may want clock-names "apb_pclk", "debounce-ref" for the > >2-clock variants? > > > Okay, I think it's very good idea, > but is it possible to post the reg-name patch after these dts serial and gpio serial patches ? You're already creating a new binding when changing the max-items. So when we change that again later, in theory you'd need to support both cases (with and without clock-names) So I'd really prefer to get the binding right the first time and identifying multiple clocks by clock-names instead of an implicit ordering is way better in the long run as well. Heiko > > > > >Heiko > > > >> --- > >> Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 5 ++++- > >> 1 file changed, 4 insertions(+), 1 deletion(-) > >> > >> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > >> index d993e00..0d62c28 100644 > >> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > >> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > >> @@ -22,7 +22,10 @@ properties: > >> maxItems: 1 > >> > >> clocks: > >> - maxItems: 1 > >> + minItems: 1 > >> + items: > >> + - description: APB interface clock source > >> + - description: GPIO debounce reference clock source > >> > >> gpio-controller: true > >> > >> > > > > > > > > > > > > > > >