From: Guenter Roeck <linux@roeck-us.net>
To: Crystal Guo <crystal.guo@mediatek.com>,
robh+dt@kernel.org, matthias.bgg@gmail.com
Cc: srv_heupstream@mediatek.com, linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org,
seiya.wang@mediatek.com
Subject: Re: [v4,4/5] dt-binding: mt8192: add toprgu reset-controller head file
Date: Mon, 14 Sep 2020 08:15:06 -0700
Message-ID: <72032ece-5162-d728-0c29-f25cd35c0c9e@roeck-us.net> (raw)
In-Reply-To: <20200803071501.30634-5-crystal.guo@mediatek.com>
On 8/3/20 12:15 AM, Crystal Guo wrote:
> add toprgu reset-controller head file for MT8192 platform
>
> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> .../reset-controller/mt8192-resets.h | 30 +++++++++++++++++++
> 1 file changed, 30 insertions(+)
> create mode 100644 include/dt-bindings/reset-controller/mt8192-resets.h
>
> diff --git a/include/dt-bindings/reset-controller/mt8192-resets.h b/include/dt-bindings/reset-controller/mt8192-resets.h
> new file mode 100644
> index 000000000000..84fee34f1c32
> --- /dev/null
> +++ b/include/dt-bindings/reset-controller/mt8192-resets.h
> @@ -0,0 +1,30 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2020 MediaTek Inc.
> + * Author: Yong Liang <yong.liang@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8192
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8192
> +
> +#define MT8183_TOPRGU_MM_SW_RST 1
> +#define MT8183_TOPRGU_MFG_SW_RST 2
> +#define MT8183_TOPRGU_VENC_SW_RST 3
> +#define MT8183_TOPRGU_VDEC_SW_RST 4
> +#define MT8183_TOPRGU_IMG_SW_RST 5
> +#define MT8183_TOPRGU_MD_SW_RST 7
> +#define MT8183_TOPRGU_CONN_SW_RST 9
> +#define MT8183_TOPRGU_CONN_MCU_SW_RST 12
> +#define MT8183_TOPRGU_IPU0_SW_RST 14
> +#define MT8183_TOPRGU_IPU1_SW_RST 15
> +#define MT8183_TOPRGU_AUDIO_SW_RST 17
> +#define MT8183_TOPRGU_CAMSYS_SW_RST 18
> +#define MT8192_TOPRGU_MJC_SW_RST 19
> +#define MT8192_TOPRGU_C2K_S2_SW_RST 20
> +#define MT8192_TOPRGU_C2K_SW_RST 21
> +#define MT8192_TOPRGU_PERI_SW_RST 22
> +#define MT8192_TOPRGU_PERI_AO_SW_RST 23
> +
> +#define MT8192_TOPRGU_SW_RST_NUM 23
> +
> +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */
>
next prev parent reply index
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-03 7:14 [v4,0/5] watchdog: mt8192: add wdt support Crystal Guo
2020-08-03 7:14 ` [v4,1/5] dt-binding: mediatek: watchdog: fix the description of compatible Crystal Guo
2020-09-14 15:13 ` Guenter Roeck
2020-08-03 7:14 ` [v4,2/5] arm64: dts: mt8183: update watchdog device node Crystal Guo
2020-09-14 15:14 ` Guenter Roeck
2020-09-21 16:58 ` Matthias Brugger
2020-08-03 7:14 ` [v4,3/5] dt-binding: mediatek: mt8192: update mtk-wdt document Crystal Guo
2020-08-03 7:15 ` [v4,4/5] dt-binding: mt8192: add toprgu reset-controller head file Crystal Guo
2020-09-14 15:15 ` Guenter Roeck [this message]
2020-08-03 7:15 ` [v4,5/5] watchdog: mt8192: add wdt support Crystal Guo
2020-09-14 15:12 ` Guenter Roeck
2020-09-11 3:26 ` [v4,0/5] " Nicolas Boichat
2020-09-14 15:26 ` Guenter Roeck
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