From: Marc Zyngier <maz@kernel.org>
To: Sam Shih <sam.shih@mediatek.com>
Cc: <matthias.bgg@gmail.com>, <Ryder.Lee@mediatek.com>,
<devicetree@vger.kernel.org>, <enric.balletbo@collabora.com>,
<fparent@baylibre.com>, <gregkh@linuxfoundation.org>,
<herbert@gondor.apana.org.au>, <hsinyi@chromium.org>,
<john@phrozen.org>, <linus.walleij@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <linux-crypto@vger.kernel.org>,
<linux-gpio@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<linux-serial@vger.kernel.org>, <linux-watchdog@vger.kernel.org>,
<linux@roeck-us.net>, <mpm@selenic.com>,
<mturquette@baylibre.com>, <robh+dt@kernel.org>,
<sboyd@kernel.org>, <sean.wang@kernel.org>,
<seiya.wang@mediatek.com>, <wim@linux-watchdog.org>
Subject: Re: [v4,8/9] arm64: dts: mediatek: add mt7986a support
Date: Mon, 04 Oct 2021 11:07:57 +0100 [thread overview]
Message-ID: <878rz9rtky.wl-maz@kernel.org> (raw)
In-Reply-To: <20211004091208.31335-1-sam.shih@mediatek.com>
On Mon, 04 Oct 2021 10:12:08 +0100,
Sam Shih <sam.shih@mediatek.com> wrote:
>
> + gic: interrupt-controller@c000000 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + interrupt-parent = <&gic>;
> + interrupt-controller;
> + reg = <0 0x0c000000 0 0x40000>, /* GICD */
> + <0 0x0c080000 0 0x80000>, /* GICR */
> + <0 0x0c400000 0 0x2000>, /* GICC */
> + <0 0x0c410000 0 0x1000>, /* GICH */
> + <0 0x0c420000 0 0x2000>; /* GICV */
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + };
Also, the GICD region is totally wrong. It is 64kB at all times. I
don't know where you get this 256kB figure from.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-10-04 10:08 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-14 8:51 [v3,0/9] Add basic SoC support for mediatek mt7986 Sam Shih
2021-09-14 8:51 ` [v3,1/9] dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC Sam Shih
2021-09-14 8:51 ` [v3,2/9] clk: mediatek: add mt7986 clock IDs Sam Shih
2021-09-14 8:51 ` [RESEND,v2,3/9] clk: mediatek: add mt7986 clock support Sam Shih
2021-09-14 8:51 ` [RESEND,v3,4/9] pinctrl: mediatek: moore: check if pin_desc is valid before use Sam Shih
2021-09-16 10:07 ` Linus Walleij
2021-09-14 8:51 ` [v3,5/9] dt-bindings: pinctrl: update bindings for MT7986 SoC Sam Shih
2021-09-14 18:00 ` Matthias Brugger
2021-09-24 11:44 ` [v4,5/9] " Sam Shih
2021-09-24 13:59 ` Rob Herring
2021-09-27 2:34 ` [v5,5/9] " Sam Shih
2021-09-27 12:23 ` Rob Herring
2021-10-04 9:41 ` [v6,5/9] " Sam Shih
2021-10-12 1:26 ` Rob Herring
2021-09-14 8:51 ` [v4,6/9] pinctrl: mediatek: add support " Sam Shih
2021-09-14 8:51 ` [RESEND,v2,7/9] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih
2021-09-14 18:00 ` Matthias Brugger
2021-09-24 11:40 ` [v3,7/9] " Sam Shih
2021-10-08 13:53 ` Matthias Brugger
2021-10-12 10:29 ` Sam Shih
2021-10-13 16:08 ` Matthias Brugger
2021-09-14 8:51 ` [RESEND,v2,8/9] arm64: dts: mediatek: add mt7986a support Sam Shih
2021-09-14 17:55 ` Matthias Brugger
2021-09-24 11:20 ` [v3,8/9] " Sam Shih
2021-09-27 12:41 ` Marc Zyngier
2021-10-04 9:12 ` [v4,8/9] " Sam Shih
2021-10-04 10:00 ` Marc Zyngier
2021-10-04 10:07 ` Marc Zyngier [this message]
2021-10-04 12:41 ` [v5,8/9] " Sam Shih
2021-09-14 8:51 ` [RESEND,v2,9/9] arm64: dts: mediatek: add mt7986b support Sam Shih
2021-09-24 11:27 ` [v3,9/9] " Sam Shih
2021-10-04 9:16 ` [v4,9/9] " Sam Shih
2021-10-04 10:09 ` Marc Zyngier
2021-10-04 12:42 ` [v5,9/9] " Sam Shih
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