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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB6053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 246a0528-45e6-4d68-45f1-08da86821e68 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Aug 2022 10:11:03.9742 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: L1bjajDaaJA4deYYN1tIHWNuygGEF1FMXh1rTf7GAUfieEippCG2CqIt/jehP4t8yfChZK5rB1XdtH+0/XcSBQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR04MB6092 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org > -----Original Message----- > From: Marco Felsch > Sent: Thursday, August 25, 2022 5:02 PM > To: Alice Guo (OSS) > Cc: Guenter Roeck ; wim@linux-watchdog.org; > shawnguo@kernel.org; s.hauer@pengutronix.de; festevam@gmail.com; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > dl-linux-imx ; kernel@pengutronix.de; > linux-watchdog@vger.kernel.org > Subject: Re: [PATCH 2/7] watchdog: imx7ulp: Add explict memory barrier fo= r > unlock sequence >=20 > On 22-08-25, Alice Guo (OSS) wrote: > > > > > -----Original Message----- > > > From: Marco Felsch > > > Sent: Thursday, August 25, 2022 3:50 PM > > > To: Alice Guo (OSS) > > > Cc: Guenter Roeck ; wim@linux-watchdog.org; > > > shawnguo@kernel.org; s.hauer@pengutronix.de; festevam@gmail.com; > > > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > > > dl-linux-imx ; kernel@pengutronix.de; > > > linux-watchdog@vger.kernel.org > > > Subject: Re: [PATCH 2/7] watchdog: imx7ulp: Add explict memory > > > barrier for unlock sequence > > > > > > On 22-08-24, Alice Guo (OSS) wrote: > > > > > > > > > -----Original Message----- > > > > > From: Marco Felsch > > > > > Sent: Wednesday, August 24, 2022 5:06 PM > > > > > To: Alice Guo (OSS) > > > > > Cc: Guenter Roeck ; wim@linux-watchdog.org; > > > > > shawnguo@kernel.org; s.hauer@pengutronix.de; > festevam@gmail.com; > > > > > linux-arm-kernel@lists.infradead.org; > > > > > linux-kernel@vger.kernel.org; dl-linux-imx ; > > > > > kernel@pengutronix.de; linux-watchdog@vger.kernel.org > > > > > Subject: Re: [PATCH 2/7] watchdog: imx7ulp: Add explict memory > > > > > barrier for unlock sequence > > > > > > > > > > Hi Alice, > > > > > > > > > > On 22-08-24, Alice Guo (OSS) wrote: > > > > > > > -----Original Message----- > > > > > > > From: Marco Felsch > > > > > > > Sent: Wednesday, August 24, 2022 4:04 PM > > > > > > > To: Alice Guo (OSS) > > > > > > > Cc: Guenter Roeck ; > > > > > > > wim@linux-watchdog.org; shawnguo@kernel.org; > > > > > > > s.hauer@pengutronix.de; > > > festevam@gmail.com; > > > > > > > linux-arm-kernel@lists.infradead.org; > > > > > > > linux-kernel@vger.kernel.org; dl-linux-imx > > > > > > > ; kernel@pengutronix.de; > > > > > > > linux-watchdog@vger.kernel.org > > > > > > > Subject: Re: [PATCH 2/7] watchdog: imx7ulp: Add explict > > > > > > > memory barrier for unlock sequence > > > > > > > > > > > > > > Hi Alice, > > > > > > > > > > > > > > On 22-08-24, Alice Guo (OSS) wrote: > > > > > > > > > > > > > > ... > > > > > > > > > > > > > > > > > > Hi Guenter and Marco, > > > > > > > > > > > > > > > > > > > > > > 1. did you see any issues? > > > > > > > > > > > This WDOG Timer first appeared in i.MX7ULP, no one > > > > > > > > > > > report issues probably because few people use i.MX7UL= P. > > > > > > > > > > > This issue was found when we did a stress test on it. > > > > > > > > > > > When we reconfigure the WDOG Timer, there is a > > > > > > > > > > > certain probability that it reset. The reason for > > > > > > > > > > > the error is that when WDOG_CS[CMD32EN] is 0, the > > > > > > > > > > > unlock sequence is two 16-bit writes (0xC520, > > > > > > > > > > > 0xD928) to the CNT register within 16 bus clocks, > > > > > > > > > > > and improper unlock sequence causes the > > > > > > > WDOG to reset. > > > > > > > > > > > Adding mb() is to guarantee that two 16-bit writes > > > > > > > > > > > are finished within 16 > > > > > > > > > bus clocks. > > > > > > > > > > > > > > > > > > > > After this explanation the whole imx7ulp_wdt_init() > > > > > > > > > > seems a bit buggy because writel_relaxed() as well as > > > > > > > > > > writel() are 32bit access > > > > > > > functions. > > > > > > > > > > So the very first thing to do is to enable the 32-bit m= ode. > > > > > > > > > > > > > > > > > > > Agreed. This is much better than having extra code to > > > > > > > > > deal with both 16-bit and 32-bit access. > > > > > > > > > > > > > > > > > > > Also this is a explanation worth to be added to the > > > > > > > > > > commit message > > > > > > > > > > ;) > > > > > > > > > > > > > > > > > > > > > > > > > > > > Definitely. Also, the use of mb(), if it should indeed > > > > > > > > > be needed, would have to be explained in a code comment. > > > > > > > > > > > > > > > > > > Thanks, > > > > > > > > > Guenter > > > > > > > > > > > > > > > > Hi Marco and Guenter, > > > > > > > > > > > > > > > > Thank you for your comments. I plan to enable support for > > > > > > > > 32-bit unlock command write words in bootloader. In this > > > > > > > > way, there is no need to distinguish whether the unlock > > > > > > > > command is a 32-bit command or a 16-bit command in driver. > > > > > > > > > > > > > > Please don't move this into the bootloader, enabling it > > > > > > > within the init seq. is just fine. If you move it into the > > > > > > > bootloader then you can't ensure that the bit is set since > > > > > > > there are plenty of bootloaders out > > > > > there. > > > > > > > > > > > > > > As I said, just drop the "16bit" unlock sequence from the > > > > > > > init function because the unlock is handled just fine in all > > > > > > > the > > > watchdog_ops. > > > > > > > > > > > > > > Regards, > > > > > > > Marco > > > > > > > > > > > > Hi Marco, > > > > > > > > > > > > Sorry, I did not tell you that all watchdog control bits, > > > > > > timeout value, and window value cannot be set until the watchdo= g is > unlocked. > > > > > > > > > > You don't have to according the RM: > > > > > 8<-------------------------------------------------------------- > > > > > ---- > > > > > ---- > > > > > 59.5.2 Disable Watchdog after Reset > > > > > > > > > > All of watchdog registers are unlocked by reset. Therefore, > > > > > unlock sequence is unnecessary, but it needs to write all of > > > > > watchdog registers to make the new configuration take effect. > > > > > The code snippet below shows an example of disabling watchdog aft= er > reset. > > > > > 8<-------------------------------------------------------------- > > > > > ---- > > > > > ---- > > > > > > > > > > also the RM tells us: > > > > > 8<-------------------------------------------------------------- > > > > > ---- > > > > > ---- > > > > > 59.4.3.1 Configuring the Watchdog Once > > > > > > > > > > The new configuration takes effect only after all registers > > > > > except CNT are written after reset. Otherwise, the WDOG uses the > > > > > reset values by default. If window mode is not used (CS[WIN] is > > > > > 0), writing to WIN is not required to make the new configuration = take > effect. > > > > > 8<-------------------------------------------------------------- > > > > > ---- > > > > > ---- > > > > > > > > > > > Support for 32-bit unlock command write words in enabled in > > > > > > imx7ulp_wdt_init now. > > > > > > > > > > So.. after reading the IMX7ULP RM, which was not my intention, I > > > > > found out that most of the WDOG_CS regiter bits are write-once bi= ts. > > > > > This means if you didn't set it within the bootloader you still > > > > > in case > > > "59.4.3.1". > > > > > > > > > > So the imx7ulp_wdt_init() function just needs to check if the > > > > > WDOG_CS_UPDATE bit was set. If it is not the case, then you need > > > > > to write the WDOG_CS register as currently done. If the bit is > > > > > set, than you need know that the bootloader did the job for you > > > > > and you can exit > > > > > imx7ulp_wdt_init() early. In both cases the unlock is not require= d. > > > > > > > > > > Can you please check/test if this is working for you? > > > > > > > > > > Regards, > > > > > Marco > > > > > > > > > > > > > Hi Marco, > > > > > > > > Rom code has already configured the WDOG once, so we cannot use " > > > > Configuring the Watchdog Once". > > > > > > What? How does the ROM code configure the WDOG? Also this would be > > > worth a comment within the code. Also still assume that this "16bit > unlock" > > > seq. > > > is useless since you writing 32bit anyway. > > > > > > Regards, > > > Marco > > > > Hi Marco, > > > > The ROM code of i.MX7ULP configures the WDOG to support 16-bit unlock > > command. I plan to add a comment to explain it in code, and keep > > "mb(); writel_relaxed; writel_relaxed; mb()" unchanged. >=20 > As said, the writel_relaxed() is also 32bit writes. Please just use the c= orrect APIs > for the stuff you wanna do. In your case, if you want 16bit access functi= ons you > need to use writew() function and you can drop the mb(). But after readin= g the > RM again, I think you can go with writel() since 32bit writes are okay, b= ut you > need to pass the two 16bit unlock commands. For that you just need to ens= ure > that the timing is correct, as noted in the RM. >=20 > Also I read that the WDOG1 is only programmed in serial downloader mode t= o > reset the device if no activity was found on the serial/usb bus. Also thi= s only > happen if the fuse for it was burned, but the RM says also: > "The watchdog is enabled by default after reset.". Can you please read th= e > Watchdog status register and post it here? >=20 > Also after after reading the RM I found the ULK bit "This read-only bit i= ndicates > whether WDOG is unlocked or not." If this bit is 0 the device is locked a= nd we > need a unlock command else we can just write the config to the device. Th= e > unlock command can than be: two writel() commands which are adding the > barriers for free. >=20 > Regards, > Marco Hi Marco, 1. Two 16-bit writes(0xC520, 0xD928) to the CNT register must be finished w= ithin 16 bus clocks. The CNT register is still a 32-bit register, so it is right to use writel_r= elaxed(). 2. After test, we found that memory barriers cannot be added between two 16= -bit writes. writel() cannot be used. 3. Software must make updates within 128 bus clocks after unlocking and bef= ore WDOG closing unlock window. The ULK bit cannot be used to indicate that WDOG can be configured. Best Regards, Alice Guo