* [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog @ 2020-12-16 18:32 vijayakannan.ayyathurai 2020-12-16 18:32 ` [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC vijayakannan.ayyathurai ` (3 more replies) 0 siblings, 4 replies; 9+ messages in thread From: vijayakannan.ayyathurai @ 2020-12-16 18:32 UTC (permalink / raw) To: wim, linux, robh+dt Cc: linux-watchdog, devicetree, andriy.shevchenko, mgross, wan.ahmad.zainie.wan.mohamad, lakshmi.bai.raja.subramanian, chen.yong.seow, vijayakannan.ayyathurai From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Hi, This patch set adds the watchdog timer driver support for Intel Keem Bay Soc. Patch 2 holds the driver and Patch 1 holds the Device Tree binding documentation. This driver was tested on the Keem Bay evaluation module board. Thank you, Vijay Changes since v3: - Fix pretimeout clear, when user attempt in the below sequence. - set pretimeout - clear pretimeout - set timeout to some other value - Cleanup the ping variable usage in the driver. - Add keembay_wdt_set_timeout_reg function. - Cleanup the keembay_wdt_th_isr function. - Rebase the driver with 5.10-rc7 tag. Changes since v2: - Remove reduntant write to TIM_WATCHDOG as per Guenter. - Rebase the driver with 5.10-rc5 tag. Changes since v1: - Fix indentation error in the dt-bindings file. - Use true/false in the second arg of keembay_wdt_set_timeout_reg(). - Fix the watchdog start sequence. - Avoid reduntant timeout register setting. - Remove min usage to find actual time at keembay_wdt_set_timeout(). - Remove timeout configuration boundary check at keembay_wdt_set_pretimeout(). - Use devm_watchdog_register_device() for wdt registration, which eventually supports driver unload functionality as well. Vijayakannan Ayyathurai (2): dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC watchdog: Add watchdog driver for Intel Keembay Soc .../bindings/watchdog/intel,keembay-wdt.yaml | 57 ++++ drivers/watchdog/Kconfig | 13 + drivers/watchdog/Makefile | 1 + drivers/watchdog/keembay_wdt.c | 286 ++++++++++++++++++ 4 files changed, 357 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml create mode 100644 drivers/watchdog/keembay_wdt.c base-commit: 0477e92881850d44910a7e94fc2c46f96faa131f prerequisite-patch-id: 822987dcf4c969ef6ac70359b088af06ba39042b prerequisite-patch-id: 0a348762b660d0d817b8e70cc71647e83173c78c prerequisite-patch-id: 54c661a006c7362053cb7602448d6c77419d5cf9 prerequisite-patch-id: d140d8534fb828778e0652fe5fcf6282e027f985 -- 2.17.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC 2020-12-16 18:32 [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog vijayakannan.ayyathurai @ 2020-12-16 18:32 ` vijayakannan.ayyathurai 2021-01-23 17:18 ` Guenter Roeck 2020-12-16 18:32 ` [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc vijayakannan.ayyathurai ` (2 subsequent siblings) 3 siblings, 1 reply; 9+ messages in thread From: vijayakannan.ayyathurai @ 2020-12-16 18:32 UTC (permalink / raw) To: wim, linux, robh+dt Cc: linux-watchdog, devicetree, andriy.shevchenko, mgross, wan.ahmad.zainie.wan.mohamad, lakshmi.bai.raja.subramanian, chen.yong.seow, vijayakannan.ayyathurai From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Add Device Tree binding document for Watchdog IP in the Intel Keem Bay SoC. Acked-by: Mark Gross <mgross@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/watchdog/intel,keembay-wdt.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml b/Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml new file mode 100644 index 000000000000..1437ff8a122f --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/intel,keembay-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Keem Bay SoC non-secure Watchdog Timer + +maintainers: + - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> + +properties: + compatible: + enum: + - intel,keembay-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + items: + - description: interrupt specifier for threshold interrupt line + - description: interrupt specifier for timeout interrupt line + + interrupt-names: + items: + - const: threshold + - const: timeout + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #define KEEM_BAY_A53_TIM + + watchdog: watchdog@2033009c { + compatible = "intel,keembay-wdt"; + reg = <0x2033009c 0x10>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "threshold", "timeout"; + clocks = <&scmi_clk KEEM_BAY_A53_TIM>; + }; + +... -- 2.17.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC 2020-12-16 18:32 ` [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC vijayakannan.ayyathurai @ 2021-01-23 17:18 ` Guenter Roeck 2021-01-25 2:56 ` Ayyathurai, Vijayakannan 0 siblings, 1 reply; 9+ messages in thread From: Guenter Roeck @ 2021-01-23 17:18 UTC (permalink / raw) To: vijayakannan.ayyathurai Cc: wim, robh+dt, linux-watchdog, devicetree, andriy.shevchenko, mgross, wan.ahmad.zainie.wan.mohamad, lakshmi.bai.raja.subramanian, chen.yong.seow On Thu, Dec 17, 2020 at 02:32:47AM +0800, vijayakannan.ayyathurai@intel.com wrote: > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > > Add Device Tree binding document for Watchdog IP in the Intel Keem Bay SoC. > > Acked-by: Mark Gross <mgross@linux.intel.com> > Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > .../bindings/watchdog/intel,keembay-wdt.yaml | 57 +++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml > > diff --git a/Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml b/Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml > new file mode 100644 > index 000000000000..1437ff8a122f > --- /dev/null > +++ b/Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/watchdog/intel,keembay-wdt.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Keem Bay SoC non-secure Watchdog Timer > + > +maintainers: > + - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> > + > +properties: > + compatible: > + enum: > + - intel,keembay-wdt > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + interrupts: > + items: > + - description: interrupt specifier for threshold interrupt line > + - description: interrupt specifier for timeout interrupt line > + > + interrupt-names: > + items: > + - const: threshold > + - const: timeout > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupt-names > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #define KEEM_BAY_A53_TIM > + > + watchdog: watchdog@2033009c { > + compatible = "intel,keembay-wdt"; > + reg = <0x2033009c 0x10>; > + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "threshold", "timeout"; > + clocks = <&scmi_clk KEEM_BAY_A53_TIM>; > + }; > + > +... ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC 2021-01-23 17:18 ` Guenter Roeck @ 2021-01-25 2:56 ` Ayyathurai, Vijayakannan 0 siblings, 0 replies; 9+ messages in thread From: Ayyathurai, Vijayakannan @ 2021-01-25 2:56 UTC (permalink / raw) To: Guenter Roeck Cc: wim, robh+dt, linux-watchdog, devicetree, andriy.shevchenko, mgross, Raja Subramanian, Lakshmi Bai, Seow, Chen Yong Hi Guenter, > From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck > > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > > > > Add Device Tree binding document for Watchdog IP in the Intel Keem Bay > SoC. > > > > Acked-by: Mark Gross <mgross@linux.intel.com> > > Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > Signed-off-by: Vijayakannan Ayyathurai > <vijayakannan.ayyathurai@intel.com> > > Reviewed-by: Rob Herring <robh@kernel.org> > > Reviewed-by: Guenter Roeck <linux@roeck-us.net> > Thank you for reviewing this patch. Thanks, Vijay ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc 2020-12-16 18:32 [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog vijayakannan.ayyathurai 2020-12-16 18:32 ` [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC vijayakannan.ayyathurai @ 2020-12-16 18:32 ` vijayakannan.ayyathurai 2021-01-23 17:18 ` Guenter Roeck 2020-12-30 7:17 ` [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog Ayyathurai, Vijayakannan 2021-01-13 10:59 ` Ayyathurai, Vijayakannan 3 siblings, 1 reply; 9+ messages in thread From: vijayakannan.ayyathurai @ 2020-12-16 18:32 UTC (permalink / raw) To: wim, linux, robh+dt Cc: linux-watchdog, devicetree, andriy.shevchenko, mgross, wan.ahmad.zainie.wan.mohamad, lakshmi.bai.raja.subramanian, chen.yong.seow, vijayakannan.ayyathurai From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Intel Keembay Soc requires watchdog timer support. Add watchdog driver to enable this. Acked-by: Mark Gross <mgross@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> --- drivers/watchdog/Kconfig | 13 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/keembay_wdt.c | 286 +++++++++++++++++++++++++++++++++ 3 files changed, 300 insertions(+) create mode 100644 drivers/watchdog/keembay_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index fd7968635e6d..f412cf2d0f1a 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -2163,4 +2163,17 @@ config USBPCWATCHDOG Most people will say N. +config KEEMBAY_WATCHDOG + tristate "Intel Keem Bay SoC non-secure watchdog" + depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST) + select WATCHDOG_CORE + help + This option enable support for an In-secure watchdog timer driver for + Intel Keem Bay SoC. This WDT has a 32 bit timer and decrements in every + count unit. An interrupt will be triggered, when the count crosses + the thershold configured in the register. + + To compile this driver as a module, choose M here: the + module will be called keembay_wdt. + endif # WATCHDOG diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 071a2e50be98..f6f9f434f407 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -146,6 +146,7 @@ obj-$(CONFIG_INTEL_MEI_WDT) += mei_wdt.o obj-$(CONFIG_NI903X_WDT) += ni903x_wdt.o obj-$(CONFIG_NIC7018_WDT) += nic7018_wdt.o obj-$(CONFIG_MLX_WDT) += mlx_wdt.o +obj-$(CONFIG_KEEMBAY_WATCHDOG) += keembay_wdt.o # M68K Architecture obj-$(CONFIG_M54xx_WATCHDOG) += m54xx_wdt.o diff --git a/drivers/watchdog/keembay_wdt.c b/drivers/watchdog/keembay_wdt.c new file mode 100644 index 000000000000..547d3fea33ff --- /dev/null +++ b/drivers/watchdog/keembay_wdt.c @@ -0,0 +1,286 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Watchdog driver for Intel Keem Bay non-secure watchdog. + * + * Copyright (C) 2020 Intel Corporation + */ + +#include <linux/arm-smccc.h> +#include <linux/bits.h> +#include <linux/clk.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/limits.h> +#include <linux/module.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> +#include <linux/reboot.h> +#include <linux/watchdog.h> + +/* Non-secure watchdog register offsets */ +#define TIM_WATCHDOG 0x0 +#define TIM_WATCHDOG_INT_THRES 0x4 +#define TIM_WDOG_EN 0x8 +#define TIM_SAFE 0xc + +#define WDT_ISR_MASK GENMASK(9, 8) +#define WDT_ISR_CLEAR 0x8200ff18 +#define WDT_UNLOCK 0xf1d0dead +#define WDT_LOAD_MAX U32_MAX +#define WDT_LOAD_MIN 1 +#define WDT_TIMEOUT 5 + +static unsigned int timeout = WDT_TIMEOUT; +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Watchdog timeout period in seconds (default = " + __MODULE_STRING(WDT_TIMEOUT) ")"); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default = " + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +struct keembay_wdt { + struct watchdog_device wdd; + struct clk *clk; + unsigned int rate; + int to_irq; + int th_irq; + void __iomem *base; +}; + +static inline u32 keembay_wdt_readl(struct keembay_wdt *wdt, u32 offset) +{ + return readl(wdt->base + offset); +} + +static inline void keembay_wdt_writel(struct keembay_wdt *wdt, u32 offset, u32 val) +{ + writel(WDT_UNLOCK, wdt->base + TIM_SAFE); + writel(val, wdt->base + offset); +} + +static void keembay_wdt_set_timeout_reg(struct watchdog_device *wdog) +{ + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); + + keembay_wdt_writel(wdt, TIM_WATCHDOG, wdog->timeout * wdt->rate); +} + +static void keembay_wdt_set_pretimeout_reg(struct watchdog_device *wdog) +{ + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); + u32 th_val = 0; + + if (wdog->pretimeout) + th_val = wdog->timeout - wdog->pretimeout; + + keembay_wdt_writel(wdt, TIM_WATCHDOG_INT_THRES, th_val * wdt->rate); +} + +static int keembay_wdt_start(struct watchdog_device *wdog) +{ + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); + + keembay_wdt_set_timeout_reg(wdog); + keembay_wdt_writel(wdt, TIM_WDOG_EN, 1); + + return 0; +} + +static int keembay_wdt_stop(struct watchdog_device *wdog) +{ + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); + + keembay_wdt_writel(wdt, TIM_WDOG_EN, 0); + + return 0; +} + +static int keembay_wdt_ping(struct watchdog_device *wdog) +{ + keembay_wdt_set_timeout_reg(wdog); + + return 0; +} + +static int keembay_wdt_set_timeout(struct watchdog_device *wdog, u32 t) +{ + wdog->timeout = t; + keembay_wdt_set_timeout_reg(wdog); + + return 0; +} + +static int keembay_wdt_set_pretimeout(struct watchdog_device *wdog, u32 t) +{ + if (t > wdog->timeout) + return -EINVAL; + + wdog->pretimeout = t; + keembay_wdt_set_pretimeout_reg(wdog); + + return 0; +} + +static unsigned int keembay_wdt_get_timeleft(struct watchdog_device *wdog) +{ + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); + + return keembay_wdt_readl(wdt, TIM_WATCHDOG) / wdt->rate; +} + +/* + * SMC call is used to clear the interrupt bits, because the TIM_GEN_CONFIG + * register is in the secure bank. + */ +static irqreturn_t keembay_wdt_to_isr(int irq, void *dev_id) +{ + struct keembay_wdt *wdt = dev_id; + struct arm_smccc_res res; + + keembay_wdt_writel(wdt, TIM_WATCHDOG, 1); + arm_smccc_smc(WDT_ISR_CLEAR, WDT_ISR_MASK, 0, 0, 0, 0, 0, 0, &res); + dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt timeout.\n"); + emergency_restart(); + + return IRQ_HANDLED; +} + +static irqreturn_t keembay_wdt_th_isr(int irq, void *dev_id) +{ + struct keembay_wdt *wdt = dev_id; + struct arm_smccc_res res; + + arm_smccc_smc(WDT_ISR_CLEAR, WDT_ISR_MASK, 0, 0, 0, 0, 0, 0, &res); + dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt pre-timeout.\n"); + watchdog_notify_pretimeout(&wdt->wdd); + + return IRQ_HANDLED; +} + +static const struct watchdog_info keembay_wdt_info = { + .identity = "Intel Keem Bay Watchdog Timer", + .options = WDIOF_SETTIMEOUT | + WDIOF_PRETIMEOUT | + WDIOF_MAGICCLOSE | + WDIOF_KEEPALIVEPING, +}; + +static const struct watchdog_ops keembay_wdt_ops = { + .owner = THIS_MODULE, + .start = keembay_wdt_start, + .stop = keembay_wdt_stop, + .ping = keembay_wdt_ping, + .set_timeout = keembay_wdt_set_timeout, + .set_pretimeout = keembay_wdt_set_pretimeout, + .get_timeleft = keembay_wdt_get_timeleft, +}; + +static int keembay_wdt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct keembay_wdt *wdt; + int ret; + + wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); + if (!wdt) + return -ENOMEM; + + wdt->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(wdt->base)) + return PTR_ERR(wdt->base); + + /* we do not need to enable the clock as it is enabled by default */ + wdt->clk = devm_clk_get(dev, NULL); + if (IS_ERR(wdt->clk)) + return dev_err_probe(dev, PTR_ERR(wdt->clk), "Failed to get clock\n"); + + wdt->rate = clk_get_rate(wdt->clk); + if (!wdt->rate) + return dev_err_probe(dev, -EINVAL, "Failed to get clock rate\n"); + + wdt->th_irq = platform_get_irq_byname(pdev, "threshold"); + if (wdt->th_irq < 0) + return dev_err_probe(dev, wdt->th_irq, "Failed to get IRQ for threshold\n"); + + ret = devm_request_irq(dev, wdt->th_irq, keembay_wdt_th_isr, 0, + "keembay-wdt", wdt); + if (ret) + return dev_err_probe(dev, ret, "Failed to request IRQ for threshold\n"); + + wdt->to_irq = platform_get_irq_byname(pdev, "timeout"); + if (wdt->to_irq < 0) + return dev_err_probe(dev, wdt->to_irq, "Failed to get IRQ for timeout\n"); + + ret = devm_request_irq(dev, wdt->to_irq, keembay_wdt_to_isr, 0, + "keembay-wdt", wdt); + if (ret) + return dev_err_probe(dev, ret, "Failed to request IRQ for timeout\n"); + + wdt->wdd.parent = dev; + wdt->wdd.info = &keembay_wdt_info; + wdt->wdd.ops = &keembay_wdt_ops; + wdt->wdd.min_timeout = WDT_LOAD_MIN; + wdt->wdd.max_timeout = WDT_LOAD_MAX / wdt->rate; + wdt->wdd.timeout = WDT_TIMEOUT; + + watchdog_set_drvdata(&wdt->wdd, wdt); + watchdog_set_nowayout(&wdt->wdd, nowayout); + watchdog_init_timeout(&wdt->wdd, timeout, dev); + keembay_wdt_set_timeout(&wdt->wdd, wdt->wdd.timeout); + + ret = devm_watchdog_register_device(dev, &wdt->wdd); + if (ret) + return dev_err_probe(dev, ret, "Failed to register watchdog device.\n"); + + platform_set_drvdata(pdev, wdt); + dev_info(dev, "Initial timeout %d sec%s.\n", + wdt->wdd.timeout, nowayout ? ", nowayout" : ""); + + return 0; +} + +static int __maybe_unused keembay_wdt_suspend(struct device *dev) +{ + struct keembay_wdt *wdt = dev_get_drvdata(dev); + + if (watchdog_active(&wdt->wdd)) + return keembay_wdt_stop(&wdt->wdd); + + return 0; +} + +static int __maybe_unused keembay_wdt_resume(struct device *dev) +{ + struct keembay_wdt *wdt = dev_get_drvdata(dev); + + if (watchdog_active(&wdt->wdd)) + return keembay_wdt_start(&wdt->wdd); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(keembay_wdt_pm_ops, keembay_wdt_suspend, + keembay_wdt_resume); + +static const struct of_device_id keembay_wdt_match[] = { + { .compatible = "intel,keembay-wdt" }, + { } +}; +MODULE_DEVICE_TABLE(of, keembay_wdt_match); + +static struct platform_driver keembay_wdt_driver = { + .probe = keembay_wdt_probe, + .driver = { + .name = "keembay_wdt", + .of_match_table = keembay_wdt_match, + .pm = &keembay_wdt_pm_ops, + }, +}; + +module_platform_driver(keembay_wdt_driver); + +MODULE_DESCRIPTION("Intel Keem Bay SoC watchdog driver"); +MODULE_AUTHOR("Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com"); +MODULE_LICENSE("GPL v2"); -- 2.17.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc 2020-12-16 18:32 ` [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc vijayakannan.ayyathurai @ 2021-01-23 17:18 ` Guenter Roeck 2021-01-25 2:57 ` Ayyathurai, Vijayakannan 0 siblings, 1 reply; 9+ messages in thread From: Guenter Roeck @ 2021-01-23 17:18 UTC (permalink / raw) To: vijayakannan.ayyathurai Cc: wim, robh+dt, linux-watchdog, devicetree, andriy.shevchenko, mgross, wan.ahmad.zainie.wan.mohamad, lakshmi.bai.raja.subramanian, chen.yong.seow On Thu, Dec 17, 2020 at 02:32:48AM +0800, vijayakannan.ayyathurai@intel.com wrote: > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > > Intel Keembay Soc requires watchdog timer support. > Add watchdog driver to enable this. > > Acked-by: Mark Gross <mgross@linux.intel.com> > Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/Kconfig | 13 ++ > drivers/watchdog/Makefile | 1 + > drivers/watchdog/keembay_wdt.c | 286 +++++++++++++++++++++++++++++++++ > 3 files changed, 300 insertions(+) > create mode 100644 drivers/watchdog/keembay_wdt.c > > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig > index fd7968635e6d..f412cf2d0f1a 100644 > --- a/drivers/watchdog/Kconfig > +++ b/drivers/watchdog/Kconfig > @@ -2163,4 +2163,17 @@ config USBPCWATCHDOG > > Most people will say N. > > +config KEEMBAY_WATCHDOG > + tristate "Intel Keem Bay SoC non-secure watchdog" > + depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST) > + select WATCHDOG_CORE > + help > + This option enable support for an In-secure watchdog timer driver for > + Intel Keem Bay SoC. This WDT has a 32 bit timer and decrements in every > + count unit. An interrupt will be triggered, when the count crosses > + the thershold configured in the register. > + > + To compile this driver as a module, choose M here: the > + module will be called keembay_wdt. > + > endif # WATCHDOG > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile > index 071a2e50be98..f6f9f434f407 100644 > --- a/drivers/watchdog/Makefile > +++ b/drivers/watchdog/Makefile > @@ -146,6 +146,7 @@ obj-$(CONFIG_INTEL_MEI_WDT) += mei_wdt.o > obj-$(CONFIG_NI903X_WDT) += ni903x_wdt.o > obj-$(CONFIG_NIC7018_WDT) += nic7018_wdt.o > obj-$(CONFIG_MLX_WDT) += mlx_wdt.o > +obj-$(CONFIG_KEEMBAY_WATCHDOG) += keembay_wdt.o > > # M68K Architecture > obj-$(CONFIG_M54xx_WATCHDOG) += m54xx_wdt.o > diff --git a/drivers/watchdog/keembay_wdt.c b/drivers/watchdog/keembay_wdt.c > new file mode 100644 > index 000000000000..547d3fea33ff > --- /dev/null > +++ b/drivers/watchdog/keembay_wdt.c > @@ -0,0 +1,286 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Watchdog driver for Intel Keem Bay non-secure watchdog. > + * > + * Copyright (C) 2020 Intel Corporation > + */ > + > +#include <linux/arm-smccc.h> > +#include <linux/bits.h> > +#include <linux/clk.h> > +#include <linux/interrupt.h> > +#include <linux/io.h> > +#include <linux/limits.h> > +#include <linux/module.h> > +#include <linux/mod_devicetable.h> > +#include <linux/platform_device.h> > +#include <linux/reboot.h> > +#include <linux/watchdog.h> > + > +/* Non-secure watchdog register offsets */ > +#define TIM_WATCHDOG 0x0 > +#define TIM_WATCHDOG_INT_THRES 0x4 > +#define TIM_WDOG_EN 0x8 > +#define TIM_SAFE 0xc > + > +#define WDT_ISR_MASK GENMASK(9, 8) > +#define WDT_ISR_CLEAR 0x8200ff18 > +#define WDT_UNLOCK 0xf1d0dead > +#define WDT_LOAD_MAX U32_MAX > +#define WDT_LOAD_MIN 1 > +#define WDT_TIMEOUT 5 > + > +static unsigned int timeout = WDT_TIMEOUT; > +module_param(timeout, int, 0); > +MODULE_PARM_DESC(timeout, "Watchdog timeout period in seconds (default = " > + __MODULE_STRING(WDT_TIMEOUT) ")"); > + > +static bool nowayout = WATCHDOG_NOWAYOUT; > +module_param(nowayout, bool, 0); > +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default = " > + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); > + > +struct keembay_wdt { > + struct watchdog_device wdd; > + struct clk *clk; > + unsigned int rate; > + int to_irq; > + int th_irq; > + void __iomem *base; > +}; > + > +static inline u32 keembay_wdt_readl(struct keembay_wdt *wdt, u32 offset) > +{ > + return readl(wdt->base + offset); > +} > + > +static inline void keembay_wdt_writel(struct keembay_wdt *wdt, u32 offset, u32 val) > +{ > + writel(WDT_UNLOCK, wdt->base + TIM_SAFE); > + writel(val, wdt->base + offset); > +} > + > +static void keembay_wdt_set_timeout_reg(struct watchdog_device *wdog) > +{ > + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); > + > + keembay_wdt_writel(wdt, TIM_WATCHDOG, wdog->timeout * wdt->rate); > +} > + > +static void keembay_wdt_set_pretimeout_reg(struct watchdog_device *wdog) > +{ > + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); > + u32 th_val = 0; > + > + if (wdog->pretimeout) > + th_val = wdog->timeout - wdog->pretimeout; > + > + keembay_wdt_writel(wdt, TIM_WATCHDOG_INT_THRES, th_val * wdt->rate); > +} > + > +static int keembay_wdt_start(struct watchdog_device *wdog) > +{ > + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); > + > + keembay_wdt_set_timeout_reg(wdog); > + keembay_wdt_writel(wdt, TIM_WDOG_EN, 1); > + > + return 0; > +} > + > +static int keembay_wdt_stop(struct watchdog_device *wdog) > +{ > + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); > + > + keembay_wdt_writel(wdt, TIM_WDOG_EN, 0); > + > + return 0; > +} > + > +static int keembay_wdt_ping(struct watchdog_device *wdog) > +{ > + keembay_wdt_set_timeout_reg(wdog); > + > + return 0; > +} > + > +static int keembay_wdt_set_timeout(struct watchdog_device *wdog, u32 t) > +{ > + wdog->timeout = t; > + keembay_wdt_set_timeout_reg(wdog); > + > + return 0; > +} > + > +static int keembay_wdt_set_pretimeout(struct watchdog_device *wdog, u32 t) > +{ > + if (t > wdog->timeout) > + return -EINVAL; > + > + wdog->pretimeout = t; > + keembay_wdt_set_pretimeout_reg(wdog); > + > + return 0; > +} > + > +static unsigned int keembay_wdt_get_timeleft(struct watchdog_device *wdog) > +{ > + struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); > + > + return keembay_wdt_readl(wdt, TIM_WATCHDOG) / wdt->rate; > +} > + > +/* > + * SMC call is used to clear the interrupt bits, because the TIM_GEN_CONFIG > + * register is in the secure bank. > + */ > +static irqreturn_t keembay_wdt_to_isr(int irq, void *dev_id) > +{ > + struct keembay_wdt *wdt = dev_id; > + struct arm_smccc_res res; > + > + keembay_wdt_writel(wdt, TIM_WATCHDOG, 1); > + arm_smccc_smc(WDT_ISR_CLEAR, WDT_ISR_MASK, 0, 0, 0, 0, 0, 0, &res); > + dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt timeout.\n"); > + emergency_restart(); > + > + return IRQ_HANDLED; > +} > + > +static irqreturn_t keembay_wdt_th_isr(int irq, void *dev_id) > +{ > + struct keembay_wdt *wdt = dev_id; > + struct arm_smccc_res res; > + > + arm_smccc_smc(WDT_ISR_CLEAR, WDT_ISR_MASK, 0, 0, 0, 0, 0, 0, &res); > + dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt pre-timeout.\n"); > + watchdog_notify_pretimeout(&wdt->wdd); > + > + return IRQ_HANDLED; > +} > + > +static const struct watchdog_info keembay_wdt_info = { > + .identity = "Intel Keem Bay Watchdog Timer", > + .options = WDIOF_SETTIMEOUT | > + WDIOF_PRETIMEOUT | > + WDIOF_MAGICCLOSE | > + WDIOF_KEEPALIVEPING, > +}; > + > +static const struct watchdog_ops keembay_wdt_ops = { > + .owner = THIS_MODULE, > + .start = keembay_wdt_start, > + .stop = keembay_wdt_stop, > + .ping = keembay_wdt_ping, > + .set_timeout = keembay_wdt_set_timeout, > + .set_pretimeout = keembay_wdt_set_pretimeout, > + .get_timeleft = keembay_wdt_get_timeleft, > +}; > + > +static int keembay_wdt_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct keembay_wdt *wdt; > + int ret; > + > + wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); > + if (!wdt) > + return -ENOMEM; > + > + wdt->base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(wdt->base)) > + return PTR_ERR(wdt->base); > + > + /* we do not need to enable the clock as it is enabled by default */ > + wdt->clk = devm_clk_get(dev, NULL); > + if (IS_ERR(wdt->clk)) > + return dev_err_probe(dev, PTR_ERR(wdt->clk), "Failed to get clock\n"); > + > + wdt->rate = clk_get_rate(wdt->clk); > + if (!wdt->rate) > + return dev_err_probe(dev, -EINVAL, "Failed to get clock rate\n"); > + > + wdt->th_irq = platform_get_irq_byname(pdev, "threshold"); > + if (wdt->th_irq < 0) > + return dev_err_probe(dev, wdt->th_irq, "Failed to get IRQ for threshold\n"); > + > + ret = devm_request_irq(dev, wdt->th_irq, keembay_wdt_th_isr, 0, > + "keembay-wdt", wdt); > + if (ret) > + return dev_err_probe(dev, ret, "Failed to request IRQ for threshold\n"); > + > + wdt->to_irq = platform_get_irq_byname(pdev, "timeout"); > + if (wdt->to_irq < 0) > + return dev_err_probe(dev, wdt->to_irq, "Failed to get IRQ for timeout\n"); > + > + ret = devm_request_irq(dev, wdt->to_irq, keembay_wdt_to_isr, 0, > + "keembay-wdt", wdt); > + if (ret) > + return dev_err_probe(dev, ret, "Failed to request IRQ for timeout\n"); > + > + wdt->wdd.parent = dev; > + wdt->wdd.info = &keembay_wdt_info; > + wdt->wdd.ops = &keembay_wdt_ops; > + wdt->wdd.min_timeout = WDT_LOAD_MIN; > + wdt->wdd.max_timeout = WDT_LOAD_MAX / wdt->rate; > + wdt->wdd.timeout = WDT_TIMEOUT; > + > + watchdog_set_drvdata(&wdt->wdd, wdt); > + watchdog_set_nowayout(&wdt->wdd, nowayout); > + watchdog_init_timeout(&wdt->wdd, timeout, dev); > + keembay_wdt_set_timeout(&wdt->wdd, wdt->wdd.timeout); > + > + ret = devm_watchdog_register_device(dev, &wdt->wdd); > + if (ret) > + return dev_err_probe(dev, ret, "Failed to register watchdog device.\n"); > + > + platform_set_drvdata(pdev, wdt); > + dev_info(dev, "Initial timeout %d sec%s.\n", > + wdt->wdd.timeout, nowayout ? ", nowayout" : ""); > + > + return 0; > +} > + > +static int __maybe_unused keembay_wdt_suspend(struct device *dev) > +{ > + struct keembay_wdt *wdt = dev_get_drvdata(dev); > + > + if (watchdog_active(&wdt->wdd)) > + return keembay_wdt_stop(&wdt->wdd); > + > + return 0; > +} > + > +static int __maybe_unused keembay_wdt_resume(struct device *dev) > +{ > + struct keembay_wdt *wdt = dev_get_drvdata(dev); > + > + if (watchdog_active(&wdt->wdd)) > + return keembay_wdt_start(&wdt->wdd); > + > + return 0; > +} > + > +static SIMPLE_DEV_PM_OPS(keembay_wdt_pm_ops, keembay_wdt_suspend, > + keembay_wdt_resume); > + > +static const struct of_device_id keembay_wdt_match[] = { > + { .compatible = "intel,keembay-wdt" }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, keembay_wdt_match); > + > +static struct platform_driver keembay_wdt_driver = { > + .probe = keembay_wdt_probe, > + .driver = { > + .name = "keembay_wdt", > + .of_match_table = keembay_wdt_match, > + .pm = &keembay_wdt_pm_ops, > + }, > +}; > + > +module_platform_driver(keembay_wdt_driver); > + > +MODULE_DESCRIPTION("Intel Keem Bay SoC watchdog driver"); > +MODULE_AUTHOR("Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com"); > +MODULE_LICENSE("GPL v2"); ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc 2021-01-23 17:18 ` Guenter Roeck @ 2021-01-25 2:57 ` Ayyathurai, Vijayakannan 0 siblings, 0 replies; 9+ messages in thread From: Ayyathurai, Vijayakannan @ 2021-01-25 2:57 UTC (permalink / raw) To: Guenter Roeck Cc: wim, robh+dt, linux-watchdog, devicetree, andriy.shevchenko, mgross, Raja Subramanian, Lakshmi Bai, Seow, Chen Yong Hi Guenter, > From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck > > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > > > > Intel Keembay Soc requires watchdog timer support. > > Add watchdog driver to enable this. > > > > Acked-by: Mark Gross <mgross@linux.intel.com> > > Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > Signed-off-by: Vijayakannan Ayyathurai > <vijayakannan.ayyathurai@intel.com> > > Reviewed-by: Guenter Roeck <linux@roeck-us.net> > Thank you for reviewing this patch. Thanks, Vijay ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog 2020-12-16 18:32 [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog vijayakannan.ayyathurai 2020-12-16 18:32 ` [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC vijayakannan.ayyathurai 2020-12-16 18:32 ` [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc vijayakannan.ayyathurai @ 2020-12-30 7:17 ` Ayyathurai, Vijayakannan 2021-01-13 10:59 ` Ayyathurai, Vijayakannan 3 siblings, 0 replies; 9+ messages in thread From: Ayyathurai, Vijayakannan @ 2020-12-30 7:17 UTC (permalink / raw) To: wim, linux, robh+dt Cc: linux-watchdog, devicetree, andriy.shevchenko, mgross, Wan Mohamad, Wan Ahmad Zainie, Raja Subramanian, Lakshmi Bai, Seow, Chen Yong Hi, Kindly help to review this updated(v4) patch set. > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > > Hi, > > This patch set adds the watchdog timer driver support for Intel Keem Bay Soc. > > Patch 2 holds the driver and Patch 1 holds the Device Tree > binding documentation. > > This driver was tested on the Keem Bay evaluation module board. > > Thank you, > Vijay > > Changes since v3: > - Fix pretimeout clear, when user attempt in the below sequence. > - set pretimeout > - clear pretimeout > - set timeout to some other value > - Cleanup the ping variable usage in the driver. > - Add keembay_wdt_set_timeout_reg function. > - Cleanup the keembay_wdt_th_isr function. > - Rebase the driver with 5.10-rc7 tag. > > Changes since v2: > - Remove reduntant write to TIM_WATCHDOG as per Guenter. > - Rebase the driver with 5.10-rc5 tag. > > Changes since v1: > - Fix indentation error in the dt-bindings file. > - Use true/false in the second arg of keembay_wdt_set_timeout_reg(). > - Fix the watchdog start sequence. > - Avoid reduntant timeout register setting. > - Remove min usage to find actual time at keembay_wdt_set_timeout(). > - Remove timeout configuration boundary check at > keembay_wdt_set_pretimeout(). > - Use devm_watchdog_register_device() for wdt registration, which > eventually supports driver unload functionality as well. > > Vijayakannan Ayyathurai (2): > dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC > watchdog: Add watchdog driver for Intel Keembay Soc > > .../bindings/watchdog/intel,keembay-wdt.yaml | 57 ++++ > drivers/watchdog/Kconfig | 13 + > drivers/watchdog/Makefile | 1 + > drivers/watchdog/keembay_wdt.c | 286 ++++++++++++++++++ > 4 files changed, 357 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/watchdog/intel,keembay-wdt.yaml > create mode 100644 drivers/watchdog/keembay_wdt.c > > > base-commit: 0477e92881850d44910a7e94fc2c46f96faa131f > prerequisite-patch-id: 822987dcf4c969ef6ac70359b088af06ba39042b > prerequisite-patch-id: 0a348762b660d0d817b8e70cc71647e83173c78c > prerequisite-patch-id: 54c661a006c7362053cb7602448d6c77419d5cf9 > prerequisite-patch-id: d140d8534fb828778e0652fe5fcf6282e027f985 > -- > 2.17.1 Thanks, Vijay ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog 2020-12-16 18:32 [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog vijayakannan.ayyathurai ` (2 preceding siblings ...) 2020-12-30 7:17 ` [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog Ayyathurai, Vijayakannan @ 2021-01-13 10:59 ` Ayyathurai, Vijayakannan 3 siblings, 0 replies; 9+ messages in thread From: Ayyathurai, Vijayakannan @ 2021-01-13 10:59 UTC (permalink / raw) To: wim, linux, robh+dt Cc: linux-watchdog, devicetree, andriy.shevchenko, mgross, Wan Mohamad, Wan Ahmad Zainie, Raja Subramanian, Lakshmi Bai, Seow, Chen Yong Hi, > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > > Changes since v3: > - Fix pretimeout clear, when user attempt in the below sequence. > - set pretimeout > - clear pretimeout > - set timeout to some other value > - Cleanup the ping variable usage in the driver. > - Add keembay_wdt_set_timeout_reg function. > - Cleanup the keembay_wdt_th_isr function. > - Rebase the driver with 5.10-rc7 tag. > Kindly help us to review this updated patch(v4) set. Thanks, Vijay > Changes since v2: > - Remove reduntant write to TIM_WATCHDOG as per Guenter. > - Rebase the driver with 5.10-rc5 tag. > > Changes since v1: > - Fix indentation error in the dt-bindings file. > - Use true/false in the second arg of keembay_wdt_set_timeout_reg(). > - Fix the watchdog start sequence. > - Avoid reduntant timeout register setting. > - Remove min usage to find actual time at keembay_wdt_set_timeout(). > - Remove timeout configuration boundary check at > keembay_wdt_set_pretimeout(). > - Use devm_watchdog_register_device() for wdt registration, which > eventually supports driver unload functionality as well. > ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-01-25 2:58 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-12-16 18:32 [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog vijayakannan.ayyathurai 2020-12-16 18:32 ` [PATCH v4 1/2] dt-bindings: watchdog: Add bindings for Intel Keem Bay SoC vijayakannan.ayyathurai 2021-01-23 17:18 ` Guenter Roeck 2021-01-25 2:56 ` Ayyathurai, Vijayakannan 2020-12-16 18:32 ` [PATCH v4 2/2] watchdog: Add watchdog driver for Intel Keembay Soc vijayakannan.ayyathurai 2021-01-23 17:18 ` Guenter Roeck 2021-01-25 2:57 ` Ayyathurai, Vijayakannan 2020-12-30 7:17 ` [PATCH v4 0/2] Add drivers for Intel Keem Bay SoC watchdog Ayyathurai, Vijayakannan 2021-01-13 10:59 ` Ayyathurai, Vijayakannan
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