[PATCH v3 0/2] arm64: renesas: Add RZ/V2M watchdog support

[PATCH v3 0/2] arm64: renesas: Add RZ/V2M watchdog support

[Phil Edworthy]

Hello all,

This patch series adds support for the Watchdog Timer (WDT) in the
RZ/V2M SoC.

v3:
 - dt-bindings: Add check for too many interrupts or clocks
 - driver: Don't call pm_runtime_get_sync() in restart()
 - driver: Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP
v2:
 - dt-bindings: Added minItems for interrupt-names and clock-names
 - driver: Replace use of parity error registers in restart
 - driver: Commit msg modified to reflect different contents

Phil Edworthy (2):
  dt-bindings: watchdog: renesas,wdt: Add r9a09g011 (RZ/V2M) support
  watchdog: rzg2l_wdt: Add rzv2m support

 .../bindings/watchdog/renesas,wdt.yaml        | 73 +++++++++++++------
 drivers/watchdog/rzg2l_wdt.c                  | 39 ++++++++--
 2 files changed, 85 insertions(+), 27 deletions(-)

-- 
2.34.1

[PATCH v3 1/2] dt-bindings: watchdog: renesas,wdt: Add r9a09g011 (RZ/V2M) support

[Phil Edworthy]

Add the documentation for the r9a09g011 SoC, but in doing so also
reorganise the doc to make it easier to read.
Additionally, make the binding require an interrupt to be specified.
Whilst the driver does not need an interrupt, all of the SoCs that use
this binding actually provide one.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
 - Add check for too many interrupts or clocks
v2:
 - Added minItems for interrupt-names and clock-names
---
 .../bindings/watchdog/renesas,wdt.yaml        | 73 +++++++++++++------
 1 file changed, 52 insertions(+), 21 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
index a8d7dde5271b..0f5675d695d6 100644
--- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
@@ -31,6 +31,11 @@ properties:
               - renesas,r9a07g054-wdt    # RZ/V2L
           - const: renesas,rzg2l-wdt
 
+      - items:
+          - enum:
+              - renesas,r9a09g011-wdt    # RZ/V2M
+          - const: renesas,rzv2m-wdt     # RZ/V2M
+
       - items:
           - enum:
               - renesas,r8a7742-wdt      # RZ/G1H
@@ -70,13 +75,29 @@ properties:
   reg:
     maxItems: 1
 
-  interrupts: true
-
-  interrupt-names: true
-
-  clocks: true
-
-  clock-names: true
+  interrupts:
+    minItems: 1
+    items:
+      - description: Timeout
+      - description: Parity error
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - const: wdt
+      - const: perrout
+
+  clocks:
+    minItems: 1
+    items:
+      - description: Register access clock
+      - description: Main clock
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: pclk
+      - const: oscclk
 
   power-domains:
     maxItems: 1
@@ -89,6 +110,7 @@ properties:
 required:
   - compatible
   - reg
+  - interrupts
   - clocks
 
 allOf:
@@ -113,31 +135,38 @@ allOf:
           contains:
             enum:
               - renesas,rzg2l-wdt
+              - renesas,rzv2m-wdt
     then:
       properties:
-        interrupts:
-          maxItems: 2
-        interrupt-names:
-          items:
-            - const: wdt
-            - const: perrout
         clocks:
-          items:
-            - description: Register access clock
-            - description: Main clock
+          minItems: 2
         clock-names:
-          items:
-            - const: pclk
-            - const: oscclk
+          minItems: 2
       required:
         - clock-names
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - renesas,rzg2l-wdt
+    then:
+      properties:
+        interrupts:
+          minItems: 2
+        interrupt-names:
+          minItems: 2
+      required:
         - interrupt-names
     else:
       properties:
         interrupts:
           maxItems: 1
-        clocks:
-          maxItems: 1
 
 additionalProperties: false
 
@@ -145,9 +174,11 @@ examples:
   - |
     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
     #include <dt-bindings/power/r8a7795-sysc.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
     wdt0: watchdog@e6020000 {
             compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
             reg = <0xe6020000 0x0c>;
+            interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
             clocks = <&cpg CPG_MOD 402>;
             power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
             resets = <&cpg 402>;
-- 
2.34.1

[PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support

[Phil Edworthy]

The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without
the parity error registers. This means the driver has to reset the
hardware plus set the minimum timeout in order to do a restart and has
a single interrupt.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v3:
 - Don't call pm_runtime_get_sync() in restart()
 - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP
v2:
 - Replace use of parity error registers in restart
 - Commit msg modified to reflect different contents
---
 drivers/watchdog/rzg2l_wdt.c | 39 ++++++++++++++++++++++++++++++------
 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 6eea0ee4af49..70cbd9ba01fe 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -10,7 +10,7 @@
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/reset.h>
@@ -40,6 +40,11 @@ module_param(nowayout, bool, 0);
 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
+enum rz_wdt_type {
+	I2C_RZG2L,
+	I2C_RZV2M,
+};
+
 struct rzg2l_wdt_priv {
 	void __iomem *base;
 	struct watchdog_device wdev;
@@ -48,6 +53,7 @@ struct rzg2l_wdt_priv {
 	unsigned long delay;
 	struct clk *pclk;
 	struct clk *osc_clk;
+	enum rz_wdt_type devtype;
 };
 
 static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv)
@@ -142,11 +148,29 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev,
 	clk_prepare_enable(priv->pclk);
 	clk_prepare_enable(priv->osc_clk);
 
-	/* Generate Reset (WDTRSTB) Signal on parity error */
-	rzg2l_wdt_write(priv, 0, PECR);
+	if (priv->devtype == I2C_RZG2L) {
+		/* Generate Reset (WDTRSTB) Signal on parity error */
+		rzg2l_wdt_write(priv, 0, PECR);
+
+		/* Force parity error */
+		rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
+	} else {
+		/* RZ/V2M doesn't have parity error registers */
+
+		wdev->timeout = 0;
+
+		/* Initialize time out */
+		rzg2l_wdt_init_timeout(wdev);
 
-	/* Force parity error */
-	rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
+		/* Initialize watchdog counter register */
+		rzg2l_wdt_write(priv, 0, WDTTIM);
+
+		/* Enable watchdog timer*/
+		rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT);
+
+		/* Wait 2 consecutive overflow cycles for reset */
+		mdelay(DIV_ROUND_UP(2 * 0xFFFFF * 1000, priv->osc_clk_rate));
+	}
 
 	return 0;
 }
@@ -227,6 +251,8 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
 	if (ret)
 		return dev_err_probe(dev, ret, "failed to deassert");
 
+	priv->devtype = (enum rz_wdt_type)of_device_get_match_data(dev);
+
 	pm_runtime_enable(&pdev->dev);
 
 	priv->wdev.info = &rzg2l_wdt_ident;
@@ -255,7 +281,8 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id rzg2l_wdt_ids[] = {
-	{ .compatible = "renesas,rzg2l-wdt", },
+	{ .compatible = "renesas,rzg2l-wdt", .data = (void *)I2C_RZG2L },
+	{ .compatible = "renesas,rzv2m-wdt", .data = (void *)I2C_RZV2M },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids);
-- 
2.34.1

Re: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support

[Geert Uytterhoeven]

On Mon, Jun 20, 2022 at 12:26 PM Phil Edworthy
<phil.edworthy@renesas.com> wrote:
> The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without
> the parity error registers. This means the driver has to reset the
> hardware plus set the minimum timeout in order to do a restart and has
> a single interrupt.
>
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v3:
>  - Don't call pm_runtime_get_sync() in restart()
>  - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v3 0/2] arm64: renesas: Add RZ/V2M watchdog support

[Phil Edworthy]

Hi Wim,

On 20 June 2022 11:26 Phil Edworthy wrote:
> Hello all,
> 
> This patch series adds support for the Watchdog Timer (WDT) in the RZ/V2M
> SoC.
> 
Is there anything blocking this series?

Thanks
Phil

> v3:
>  - dt-bindings: Add check for too many interrupts or clocks
>  - driver: Don't call pm_runtime_get_sync() in restart()
>  - driver: Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP
> v2:
>  - dt-bindings: Added minItems for interrupt-names and clock-names
>  - driver: Replace use of parity error registers in restart
>  - driver: Commit msg modified to reflect different contents
> 
> Phil Edworthy (2):
>   dt-bindings: watchdog: renesas,wdt: Add r9a09g011 (RZ/V2M) support
>   watchdog: rzg2l_wdt: Add rzv2m support
> 
>  .../bindings/watchdog/renesas,wdt.yaml        | 73 +++++++++++++------
>  drivers/watchdog/rzg2l_wdt.c                  | 39 ++++++++--
>  2 files changed, 85 insertions(+), 27 deletions(-)
> 
> --
> 2.34.1

RE: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support

[Biju Das]

Hi Phil,

Thanks for the patch.

> Subject: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support
> 
> The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without
> the parity error registers. This means the driver has to reset the
> hardware plus set the minimum timeout in order to do a restart and has a
> single interrupt.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v3:
>  - Don't call pm_runtime_get_sync() in restart()
>  - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP
> v2:
>  - Replace use of parity error registers in restart
>  - Commit msg modified to reflect different contents
> ---
>  drivers/watchdog/rzg2l_wdt.c | 39 ++++++++++++++++++++++++++++++------
>  1 file changed, 33 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
> index 6eea0ee4af49..70cbd9ba01fe 100644
> --- a/drivers/watchdog/rzg2l_wdt.c
> +++ b/drivers/watchdog/rzg2l_wdt.c
> @@ -10,7 +10,7 @@
>  #include <linux/io.h>
>  #include <linux/kernel.h>
>  #include <linux/module.h>
> -#include <linux/of.h>
> +#include <linux/of_device.h>
>  #include <linux/platform_device.h>
>  #include <linux/pm_runtime.h>
>  #include <linux/reset.h>
> @@ -40,6 +40,11 @@ module_param(nowayout, bool, 0);
> MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started
> (default="
>  				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
> 
> +enum rz_wdt_type {
> +	I2C_RZG2L,
> +	I2C_RZV2M,
> +};
> +

May be I2C_* to WDT_* ??

>  struct rzg2l_wdt_priv {
>  	void __iomem *base;
>  	struct watchdog_device wdev;
> @@ -48,6 +53,7 @@ struct rzg2l_wdt_priv {
>  	unsigned long delay;
>  	struct clk *pclk;
>  	struct clk *osc_clk;
> +	enum rz_wdt_type devtype;
>  };
> 
>  static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) @@ -
> 142,11 +148,29 @@ static int rzg2l_wdt_restart(struct watchdog_device
> *wdev,
>  	clk_prepare_enable(priv->pclk);
>  	clk_prepare_enable(priv->osc_clk);
> 
> -	/* Generate Reset (WDTRSTB) Signal on parity error */
> -	rzg2l_wdt_write(priv, 0, PECR);
> +	if (priv->devtype == I2C_RZG2L) {

Same here.

> +		/* Generate Reset (WDTRSTB) Signal on parity error */
> +		rzg2l_wdt_write(priv, 0, PECR);
> +
> +		/* Force parity error */
> +		rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
> +	} else {
> +		/* RZ/V2M doesn't have parity error registers */
> +
> +		wdev->timeout = 0;
> +
> +		/* Initialize time out */
> +		rzg2l_wdt_init_timeout(wdev);
> 
> -	/* Force parity error */
> -	rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
> +		/* Initialize watchdog counter register */
> +		rzg2l_wdt_write(priv, 0, WDTTIM);
> +
> +		/* Enable watchdog timer*/
> +		rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT);
> +
> +		/* Wait 2 consecutive overflow cycles for reset */
> +		mdelay(DIV_ROUND_UP(2 * 0xFFFFF * 1000, priv-
> >osc_clk_rate));
> +	}
> 
>  	return 0;
>  }
> @@ -227,6 +251,8 @@ static int rzg2l_wdt_probe(struct platform_device
> *pdev)
>  	if (ret)
>  		return dev_err_probe(dev, ret, "failed to deassert");
> 
> +	priv->devtype = (enum rz_wdt_type)of_device_get_match_data(dev);
> +
>  	pm_runtime_enable(&pdev->dev);
> 
>  	priv->wdev.info = &rzg2l_wdt_ident;
> @@ -255,7 +281,8 @@ static int rzg2l_wdt_probe(struct platform_device
> *pdev)  }
> 
>  static const struct of_device_id rzg2l_wdt_ids[] = {
> -	{ .compatible = "renesas,rzg2l-wdt", },
> +	{ .compatible = "renesas,rzg2l-wdt", .data = (void *)I2C_RZG2L },
> +	{ .compatible = "renesas,rzv2m-wdt", .data = (void *)I2C_RZV2M },

Same here.

Cheers,
Biju

>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids);
> --
> 2.34.1

RE: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support

[Phil Edworthy]

Hi Biju,

On 22 August 2022 08:20 Biju Das wrote:
> > Subject: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support
> >
> > The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without
> > the parity error registers. This means the driver has to reset the
> > hardware plus set the minimum timeout in order to do a restart and has a
> > single interrupt.
> >
> > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > v3:
> >  - Don't call pm_runtime_get_sync() in restart()
> >  - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP
> > v2:
> >  - Replace use of parity error registers in restart
> >  - Commit msg modified to reflect different contents
> > ---
> >  drivers/watchdog/rzg2l_wdt.c | 39 ++++++++++++++++++++++++++++++------
> >  1 file changed, 33 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
> > index 6eea0ee4af49..70cbd9ba01fe 100644
> > --- a/drivers/watchdog/rzg2l_wdt.c
> > +++ b/drivers/watchdog/rzg2l_wdt.c
> > @@ -10,7 +10,7 @@
> >  #include <linux/io.h>
> >  #include <linux/kernel.h>
> >  #include <linux/module.h>
> > -#include <linux/of.h>
> > +#include <linux/of_device.h>
> >  #include <linux/platform_device.h>
> >  #include <linux/pm_runtime.h>
> >  #include <linux/reset.h>
> > @@ -40,6 +40,11 @@ module_param(nowayout, bool, 0);
> > MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started
> > (default="
> >  				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
> >
> > +enum rz_wdt_type {
> > +	I2C_RZG2L,
> > +	I2C_RZV2M,
> > +};
> > +
> 
> May be I2C_* to WDT_* ??
Oops, yes I will fix this.

Thanks
Phil

> >  struct rzg2l_wdt_priv {
> >  	void __iomem *base;
> >  	struct watchdog_device wdev;
> > @@ -48,6 +53,7 @@ struct rzg2l_wdt_priv {
> >  	unsigned long delay;
> >  	struct clk *pclk;
> >  	struct clk *osc_clk;
> > +	enum rz_wdt_type devtype;
> >  };
> >
> >  static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) @@ -
> > 142,11 +148,29 @@ static int rzg2l_wdt_restart(struct watchdog_device
> > *wdev,
> >  	clk_prepare_enable(priv->pclk);
> >  	clk_prepare_enable(priv->osc_clk);
> >
> > -	/* Generate Reset (WDTRSTB) Signal on parity error */
> > -	rzg2l_wdt_write(priv, 0, PECR);
> > +	if (priv->devtype == I2C_RZG2L) {
> 
> Same here.
> 
> > +		/* Generate Reset (WDTRSTB) Signal on parity error */
> > +		rzg2l_wdt_write(priv, 0, PECR);
> > +
> > +		/* Force parity error */
> > +		rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
> > +	} else {
> > +		/* RZ/V2M doesn't have parity error registers */
> > +
> > +		wdev->timeout = 0;
> > +
> > +		/* Initialize time out */
> > +		rzg2l_wdt_init_timeout(wdev);
> >
> > -	/* Force parity error */
> > -	rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
> > +		/* Initialize watchdog counter register */
> > +		rzg2l_wdt_write(priv, 0, WDTTIM);
> > +
> > +		/* Enable watchdog timer*/
> > +		rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT);
> > +
> > +		/* Wait 2 consecutive overflow cycles for reset */
> > +		mdelay(DIV_ROUND_UP(2 * 0xFFFFF * 1000, priv-
> > >osc_clk_rate));
> > +	}
> >
> >  	return 0;
> >  }
> > @@ -227,6 +251,8 @@ static int rzg2l_wdt_probe(struct platform_device
> > *pdev)
> >  	if (ret)
> >  		return dev_err_probe(dev, ret, "failed to deassert");
> >
> > +	priv->devtype = (enum rz_wdt_type)of_device_get_match_data(dev);
> > +
> >  	pm_runtime_enable(&pdev->dev);
> >
> >  	priv->wdev.info = &rzg2l_wdt_ident;
> > @@ -255,7 +281,8 @@ static int rzg2l_wdt_probe(struct platform_device
> > *pdev)  }
> >
> >  static const struct of_device_id rzg2l_wdt_ids[] = {
> > -	{ .compatible = "renesas,rzg2l-wdt", },
> > +	{ .compatible = "renesas,rzg2l-wdt", .data = (void *)I2C_RZG2L },
> > +	{ .compatible = "renesas,rzv2m-wdt", .data = (void *)I2C_RZV2M },
> 
> Same here.
> 
> Cheers,
> Biju
> 
> >  	{ /* sentinel */ }
> >  };
> >  MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids);
> > --
> > 2.34.1