From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EEF2C3A5A0 for ; Wed, 21 Aug 2019 15:52:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 305EE22DD3 for ; Wed, 21 Aug 2019 15:52:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=yadro.com header.i=@yadro.com header.b="XuASEHZZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727188AbfHUPwZ (ORCPT ); Wed, 21 Aug 2019 11:52:25 -0400 Received: from mta-02.yadro.com ([89.207.88.252]:58182 "EHLO mta-01.yadro.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726762AbfHUPwZ (ORCPT ); Wed, 21 Aug 2019 11:52:25 -0400 Received: from localhost (unknown [127.0.0.1]) by mta-01.yadro.com (Postfix) with ESMTP id 2E05142ED0; Wed, 21 Aug 2019 15:52:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=yadro.com; h= content-transfer-encoding:mime-version:user-agent:content-type :content-type:organization:date:date:from:from:subject:subject :message-id:received:received:received; s=mta-01; t=1566402743; x=1568217144; bh=pOc3KLiQCgqwQcr8n6hsHD5m1EFrOU7bcNFQtatabT8=; b= XuASEHZZRwvvUATkU2u1FcGIrD4HSAQKr07D8arfRKO8d3PH4qoMl113V/7VG+qt DFvR4RSpUEGrdWp5nnKj6cizV5AaCtOdq83kVRJ3xEm7rxLJc6xVc862i9q+47mr NfHev9oMvRc3WK1Nkm5/pAJnatYzgwjPBFT1CoMBivo= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4SUR6-yrjwhX; Wed, 21 Aug 2019 18:52:23 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id E51774120B; Wed, 21 Aug 2019 18:52:22 +0300 (MSK) Received: from localhost.localdomain (172.17.15.69) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Wed, 21 Aug 2019 18:52:22 +0300 Message-ID: Subject: [PATCH 0/3] add dual-boot support From: Ivan Mikhaylov To: Wim Van Sebroeck , Guenter Roeck CC: Joel Stanley , Andrew Jeffery , , , , , "Alexander Amelkin" Date: Wed, 21 Aug 2019 18:52:22 +0300 Organization: YADRO Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.30.5 (3.30.5-1.fc29) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Originating-IP: [172.17.15.69] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org ASPEED SoCs support dual-boot feature for SPI Flash. When strapped appropriately, the SoC starts wdt2 (/dev/watchdog1) and if within a minute it is not disabled, it goes off and reboots the SoC from an alternate SPI Flash chip by changing CS0 controls to actually drive CS1 line. When booted from alternate chip, in order to access the main chip at CS0, the user must reset the appropriate bit in the watchdog hardware. There is no interface that would allow to do that from an embedded firmware startup script. This commit implements support for that feature: * Enable 'alt-boot' option for wdt2 * Enable secondary SPI flash chip * Make it possible to get access to the primary SPI flash chip at CS0 after booting from the alternate chip at CS1. A sysfs interface is added to provide an easy way for embedded firmware startup scripts to clear the chip select bit to gain access to the primary flash chip in order to allow for recovery of its contents. Ivan Mikhaylov (3): vesnin: add wdt2 section with alt-boot option vesnin: add secondary SPI flash chip watchdog/aspeed: add support for dual boot arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 12 +++++++++ drivers/watchdog/aspeed_wdt.c | 30 +++++++++++++++++++++ 2 files changed, 42 insertions(+) -- 2.20.1