From: <yhchuang@realtek.com>
To: <kvalo@codeaurora.org>, <johannes@sipsolutions.net>
Cc: <Larry.Finger@lwfinger.net>, <linux-wireless@vger.kernel.org>,
<pkshih@realtek.com>, <tehuang@realtek.com>,
<briannorris@chromium.org>, <sgruszka@redhat.com>
Subject: [PATCH v2 05/24] rtw88: add a delay after writing a rf register
Date: Thu, 14 Feb 2019 16:58:44 +0800 [thread overview]
Message-ID: <1550134743-17443-6-git-send-email-yhchuang@realtek.com> (raw)
In-Reply-To: <1550134743-17443-1-git-send-email-yhchuang@realtek.com>
From: Chien-Hsun Liao <ben.liao@realtek.com>
After writing a rf register, driver should wait for several
microseconds. If we write a rf register and read it immediately
without a delay, we could get a wrong value because the writing is
not finished yet. Based on the simulation results, writing a rf
register by pi write needs 13 microsenconds, writing rf register
directly write needs 1 microsecond to complete.
And modify direct write flow to make sure that there is no hardware pi
write simultaneously.
Signed-off-by: Chien-Hsun Liao <ben.liao@realtek.com>
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
---
drivers/net/wireless/realtek/rtw88/phy.c | 10 ++++++++++
drivers/net/wireless/realtek/rtw88/reg.h | 4 ++++
2 files changed, 14 insertions(+)
diff --git a/drivers/net/wireless/realtek/rtw88/phy.c b/drivers/net/wireless/realtek/rtw88/phy.c
index ae066e6..6cb07b5 100644
--- a/drivers/net/wireless/realtek/rtw88/phy.c
+++ b/drivers/net/wireless/realtek/rtw88/phy.c
@@ -5,6 +5,7 @@
#include <linux/bcd.h>
#include "main.h"
+#include "reg.h"
#include "fw.h"
#include "phy.h"
#include "debug.h"
@@ -573,6 +574,8 @@ bool rtw_phy_write_rf_reg_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
rtw_write32(rtwdev, sipi_addr[rf_path], data_and_addr);
+ udelay(13);
+
return true;
}
@@ -593,8 +596,15 @@ bool rtw_phy_write_rf_reg(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
direct_addr = base_addr[rf_path] + (addr << 2);
mask &= RFREG_MASK;
+ rtw_write32_mask(rtwdev, REG_RSV_CTRL, BITS_RFC_DIRECT, DISABLE_PI);
+ rtw_write32_mask(rtwdev, REG_WLRF1, BITS_RFC_DIRECT, DISABLE_PI);
rtw_write32_mask(rtwdev, direct_addr, mask, data);
+ udelay(1);
+
+ rtw_write32_mask(rtwdev, REG_RSV_CTRL, BITS_RFC_DIRECT, ENABLE_PI);
+ rtw_write32_mask(rtwdev, REG_WLRF1, BITS_RFC_DIRECT, ENABLE_PI);
+
return true;
}
diff --git a/drivers/net/wireless/realtek/rtw88/reg.h b/drivers/net/wireless/realtek/rtw88/reg.h
index 05424ec..304c8df 100644
--- a/drivers/net/wireless/realtek/rtw88/reg.h
+++ b/drivers/net/wireless/realtek/rtw88/reg.h
@@ -14,6 +14,9 @@
#define BIT_CPU_CLK_EN BIT(14)
#define REG_RSV_CTRL 0x001C
+#define DISABLE_PI 0x3
+#define ENABLE_PI 0x2
+#define BITS_RFC_DIRECT (BIT(31) | BIT(30))
#define BIT_WLMCU_IOIF BIT(0)
#define REG_RF_CTRL 0x001F
#define BIT_RF_SDM_RSTB BIT(2)
@@ -66,6 +69,7 @@
BIT_CHECK_SUM_OK)
#define FW_READY_MASK 0xffff
+#define REG_WLRF1 0x00EC
#define REG_SYS_CFG1 0x00F0
#define BIT_RTL_ID BIT(23)
#define BIT_RF_TYPE_ID BIT(27)
--
2.7.4
next prev parent reply other threads:[~2019-02-14 8:59 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 8:58 [PATCH v2 00/24] rtw88: major fixes for 8822c to have stable functionalities yhchuang
2019-02-14 8:58 ` [PATCH v2 01/24] rtw88: report correct tx status if mac80211 requested one yhchuang
2019-02-14 8:58 ` [PATCH v2 02/24] rtw88: add get_c2h_from_skb for extracting c2h commands yhchuang
2019-02-14 8:58 ` [PATCH v2 03/24] rtw88: can not support vif beacon filter actually yhchuang
2019-02-14 8:58 ` [PATCH v2 04/24] rtw88: fix incorrect bit definition for RF mode yhchuang
2019-02-14 8:58 ` yhchuang [this message]
2019-02-14 8:58 ` [PATCH v2 06/24] rtw88: 8822c: correct crystal setting yhchuang
2019-02-14 8:58 ` [PATCH v2 07/24] rtw88: 8822c: update efuse table as released yhchuang
2019-02-14 8:58 ` [PATCH v2 08/24] rtw88: 8822c: update pwr_seq to v12 yhchuang
2019-02-14 8:58 ` [PATCH v2 09/24] rtw88: 8822c: update phy parameter to v27 yhchuang
2019-02-14 8:58 ` [PATCH v2 10/24] rtw88: 8822c: update channel setting yhchuang
2019-02-14 8:58 ` [PATCH v2 11/24] rtw88: 8822c: update trx mode setting yhchuang
2019-02-14 8:58 ` [PATCH v2 12/24] rtw88: add module param to switch lps supportability yhchuang
2019-02-14 8:58 ` [PATCH v2 13/24] rtw88: add 8822c tx power index table parsing support yhchuang
2019-02-14 8:58 ` [PATCH v2 14/24] rtw88: add 8822c tx agc support yhchuang
2019-02-14 8:58 ` [PATCH v2 15/24] rtw88: extract utility functions into util.c yhchuang
2019-02-14 8:58 ` [PATCH v2 16/24] rtw88: 8822c: add support for DACK yhchuang
2019-02-14 8:58 ` [PATCH v2 17/24] rtw88: 8822c: fix RSC setting yhchuang
2019-02-14 8:58 ` [PATCH v2 18/24] rtw88: 8822c: set ack timeout yhchuang
2019-02-14 8:58 ` [PATCH v2 19/24] rtw88: 8822c: do not reset MAC Rx before sending CCK packet yhchuang
2019-02-14 8:58 ` [PATCH v2 20/24] rtw88: 8822c: parse packet by sigb length yhchuang
2019-02-14 8:59 ` [PATCH v2 21/24] rtw88: do not count dummy tail into rx counter yhchuang
2019-02-14 8:59 ` [PATCH v2 22/24] rtw88: set OFDM ctx to receive ack after cts2self yhchuang
2019-02-14 8:59 ` [PATCH v2 23/24] rtw88: fix slot time value yhchuang
2019-02-14 8:59 ` [PATCH v2 24/24] rtw88: 8822b: turn rtw_write32s_mask into macro yhchuang
2019-02-26 8:20 ` [PATCH v2 00/24] rtw88: major fixes for 8822c to have stable functionalities Tony Chuang
2019-03-08 10:39 ` Kalle Valo
2019-03-08 12:38 ` Tony Chuang
2019-03-08 13:06 ` Stanislaw Gruszka
2019-03-08 13:00 ` Stanislaw Gruszka
2019-03-08 18:43 ` Brian Norris
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