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From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-mtd@lists.infradead.org
Cc: "Florian Fainelli" <f.fainelli@gmail.com>,
	"Rafał Miłecki" <zajec5@gmail.com>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Brian Norris" <computersforpeace@gmail.com>,
	"Kamal Dasu" <kdasu.kdev@gmail.com>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Cai Huoqing" <caihuoqing@baidu.com>,
	"Colin Ian King" <colin.king@intel.com>,
	linux-kernel@vger.kernel.org (open list),
	linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA
	DRIVER (BCMA)),
	bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB
	NAND FLASH DRIVER)
Subject: [PATCH v2 5/9] mtd: rawnand: brcmnand: Allow working without interrupts
Date: Thu,  6 Jan 2022 16:13:24 -0800	[thread overview]
Message-ID: <20220107001328.2233896-6-f.fainelli@gmail.com> (raw)
In-Reply-To: <20220107001328.2233896-1-f.fainelli@gmail.com>

The BCMA devices include the brcmnand controller but they do not wire up
any interrupt line, allow the main interrupt to be optional and update
the completion path to also check for the lack of an interrupt line.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/mtd/nand/raw/brcmnand/brcmnand.c | 54 +++++++++++-------------
 1 file changed, 24 insertions(+), 30 deletions(-)

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index eb3f96489f83..08e2acde5133 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -216,7 +216,7 @@ struct brcmnand_controller {
 	void __iomem		*nand_base;
 	void __iomem		*nand_fc; /* flash cache */
 	void __iomem		*flash_dma_base;
-	unsigned int		irq;
+	int			irq;
 	unsigned int		dma_irq;
 	int			nand_version;
 
@@ -1610,7 +1610,7 @@ static bool brcmstb_nand_wait_for_completion(struct nand_chip *chip)
 	bool err = false;
 	int sts;
 
-	if (mtd->oops_panic_write) {
+	if (mtd->oops_panic_write || ctrl->irq < 0) {
 		/* switch to interrupt polling and PIO mode */
 		disable_ctrl_irqs(ctrl);
 		sts = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY,
@@ -3144,35 +3144,29 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
 	}
 
 	/* IRQ */
-	ctrl->irq = platform_get_irq(pdev, 0);
-	if ((int)ctrl->irq < 0) {
-		dev_err(dev, "no IRQ defined\n");
-		ret = -ENODEV;
-		goto err;
-	}
-
-	/*
-	 * Some SoCs integrate this controller (e.g., its interrupt bits) in
-	 * interesting ways
-	 */
-	if (soc) {
-		ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
-				       DRV_NAME, ctrl);
+	ctrl->irq = platform_get_irq_optional(pdev, 0);
+	if (ctrl->irq > 0) {
+		/*
+		 * Some SoCs integrate this controller (e.g., its interrupt bits) in
+		 * interesting ways
+		 */
+		if (soc) {
+			ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
+					       DRV_NAME, ctrl);
 
-		/* Enable interrupt */
-		ctrl->soc->ctlrdy_ack(ctrl->soc);
-		ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
-		if (brcmnand_soc_has_ops(soc))
-			static_branch_enable(&brcmnand_soc_has_ops_key);
-	} else {
-		/* Use standard interrupt infrastructure */
-		ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
-				       DRV_NAME, ctrl);
-	}
-	if (ret < 0) {
-		dev_err(dev, "can't allocate IRQ %d: error %d\n",
-			ctrl->irq, ret);
-		goto err;
+			/* Enable interrupt */
+			ctrl->soc->ctlrdy_ack(ctrl->soc);
+			ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
+		} else {
+			/* Use standard interrupt infrastructure */
+			ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
+					       DRV_NAME, ctrl);
+		}
+		if (ret < 0) {
+			dev_err(dev, "can't allocate IRQ %d: error %d\n",
+				ctrl->irq, ret);
+			goto err;
+		}
 	}
 
 	for_each_available_child_of_node(dn, child) {
-- 
2.25.1


  parent reply	other threads:[~2022-01-07  0:14 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-07  0:13 [PATCH v2 0/9] BCMA support for brcmnand Florian Fainelli
2022-01-07  0:13 ` [PATCH v2 1/9] mtd: rawnand: brcmnand: Assign soc as early as possible Florian Fainelli
2022-01-07  0:13 ` [PATCH v2 2/9] mtd: rawnand: brcmnand: Allow SoC to provide I/O operations Florian Fainelli
2022-01-07  3:10   ` Florian Fainelli
2022-01-07  7:22     ` Miquel Raynal
2022-01-07  0:13 ` [PATCH v2 3/9] mtd: rawnand: brcmnand: Avoid pdev in brcmnand_init_cs() Florian Fainelli
2022-01-07  0:13 ` [PATCH v2 4/9] mtd: rawnand: brcmnand: Move OF operations out of brcmnand_init_cs() Florian Fainelli
2022-01-07  0:13 ` Florian Fainelli [this message]
2022-01-07  0:13 ` [PATCH v2 6/9] mtd: rawnand: brcmnand: Add platform data structure for BCMA Florian Fainelli
2022-01-07  0:13 ` [PATCH v2 7/9] mtd: rawnand: brcmnand: Allow platform data instantation Florian Fainelli
2022-01-07  0:13 ` [PATCH v2 8/9] mtd: rawnand: brcmnand: BCMA controller uses command shift of 0 Florian Fainelli
2022-01-07  0:13 ` [PATCH v2 9/9] mtd: rawnand: brcmnand: Add BCMA shim Florian Fainelli

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