From: Bitterblue Smith <rtl8821cerfe2@gmail.com>
To: "linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>
Cc: Jes Sorensen <Jes.Sorensen@gmail.com>, Ping-Ke Shih <pkshih@realtek.com>
Subject: [PATCH 1/2] wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled
Date: Thu, 8 Dec 2022 21:32:18 +0200 [thread overview]
Message-ID: <4368d585-11ec-d3c7-ec12-7f0afdcedfda@gmail.com> (raw)
Just because priv->pi_enabled is only one bit doesn't mean it works
like a bool. The value assigned to it loses all bits except bit 0,
so only assign 0 or 1 to it.
This affects the RTL8188FU, but fixing the assignment didn't make
a difference for my device.
Fixes: c888183b21f3 ("wifi: rtl8xxxu: Support new chip RTL8188FU")
Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
---
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
index 2c4f403ba68f..97e7ff7289fa 100644
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
@@ -1122,7 +1122,7 @@ static void rtl8188fu_phy_iqcalibrate(struct rtl8xxxu_priv *priv,
if (t == 0) {
val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1);
- priv->pi_enabled = val32 & FPGA0_HSSI_PARM1_PI;
+ priv->pi_enabled = u32_get_bits(val32, FPGA0_HSSI_PARM1_PI);
}
/* save RF path */
--
2.38.0
next reply other threads:[~2022-12-08 19:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-08 19:32 Bitterblue Smith [this message]
2022-12-08 19:34 ` [PATCH 2/2] wifi: rtl8xxxu: Fix assignment to bit field priv->cck_agc_report_type Bitterblue Smith
2022-12-09 8:15 ` Ping-Ke Shih
2022-12-09 8:14 ` [PATCH 1/2] wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled Ping-Ke Shih
2022-12-14 12:23 ` Kalle Valo
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