From: "Luis R. Rodriguez" <lrodriguez@atheros.com>
To: Jiri Slaby <jirislaby@gmail.com>
Cc: linux-wireless@vger.kernel.org, ath5k-devel@lists.ath5k.org,
Bob Copeland <me@bobcopeland.com>,
linville@tuxdriver.com, ath9k-devel@lists.ath9k.org,
Nick Kossifidis <mickflemm@gmail.com>
Subject: Re: [ath9k-devel] [PATCH] ath5k: fix requested allocated RX skb size for DMA
Date: Wed, 12 Aug 2009 11:48:45 -0700 [thread overview]
Message-ID: <43e72e890908121148l2cde20a9xb2c045e03574ffaa@mail.gmail.com> (raw)
In-Reply-To: <4A83064A.2080609@gmail.com>
On Wed, Aug 12, 2009 at 11:13 AM, Jiri Slaby<jirislaby@gmail.com> wrote:
> On 08/12/2009 06:58 PM, Luis R. Rodriguez wrote:
>> --- a/drivers/net/wireless/ath/ath5k/base.c
>> +++ b/drivers/net/wireless/ath/ath5k/base.c
>> @@ -1157,17 +1157,18 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
>> * fake physical layer header at the start.
>> */
>> skb = ath_rxbuf_alloc(&sc->common,
>> - sc->rxbufsize + sc->common.cachelsz - 1,
>
> What was the exact purpose of this? My guess is that we should map
> starting at a next cache line boundary and put this aligned address to
> the device instead?
I've heard two theories:
1) AR5210 *required* it otherwise bad we would get bad data
2) Performance considerations
I've tried checking internally but haven't found out yet the exact
answer and this seems purely historical. I poked Sam Leffler to see if
he recalls. But as we the 0x41 reset which I removed it seems to be
best to leave unless we can be 100% sure we can remove this.
Luis
next prev parent reply other threads:[~2009-08-12 18:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-12 16:58 [PATCH] ath5k: fix requested allocated RX skb size for DMA Luis R. Rodriguez
2009-08-12 18:13 ` Jiri Slaby
2009-08-12 18:48 ` Luis R. Rodriguez [this message]
2009-08-12 21:08 ` [ath9k-devel] " Bob Copeland
2009-08-13 3:33 ` Luis R. Rodriguez
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