From: Daniel Drake <drake@endlessm.com>
To: Chris Chiu <chiu@endlessm.com>
Cc: Jes Sorensen <jes.sorensen@gmail.com>,
Kalle Valo <kvalo@codeaurora.org>,
David Miller <davem@davemloft.net>,
linux-wireless <linux-wireless@vger.kernel.org>,
netdev <netdev@vger.kernel.org>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Linux Upstreaming Team <linux@endlessm.com>
Subject: Re: [PATCH v2] rtl8xxxu: Fix wifi low signal strength issue of RTL8723BU
Date: Fri, 12 Jul 2019 15:25:52 +0800 [thread overview]
Message-ID: <CAD8Lp45Qe-GKrtCR=d4GCx+PPAtmMQfHK2VpmA_yHMNFJ3ijww@mail.gmail.com> (raw)
In-Reply-To: <CAB4CAwc8jJQ2f8vpoB0Y6sc0fJmmrq+5rRuJ+TqGMMgCczRi+A@mail.gmail.com>
On Fri, Jul 5, 2019 at 10:27 AM Chris Chiu <chiu@endlessm.com> wrote:
> Per the code before REG_S0S1_PATH_SWITCH setting, the driver has told
> the co-processor the antenna is inverse.
> memset(&h2c, 0, sizeof(struct h2c_cmd));
> h2c.ant_sel_rsv.cmd = H2C_8723B_ANT_SEL_RSV;
> h2c.ant_sel_rsv.ant_inverse = 1;
> h2c.ant_sel_rsv.int_switch_type = 0;
> rtl8xxxu_gen2_h2c_cmd(priv, &h2c, sizeof(h2c.ant_sel_rsv));
>
> At least the current modification is consistent with the antenna
> inverse setting.
> I'll verify on vendor driver about when/how the inverse be determined.
I checked this out. The codepath hit hardcodes it to the AUX port,
i.e. "inverted" setup:
EXhalbtc8723b1ant_PowerOnSetting():
if(pBtCoexist->chipInterface == BTC_INTF_USB)
{
// fixed at S0 for USB interface
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
u1Tmp |= 0x1; // antenna inverse
pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
}
So I'm further convinced that these performance-enhancing changes are
increasing consistency with the vendor driver.
Daniel
next prev parent reply other threads:[~2019-07-12 7:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-04 10:55 [PATCH v2] rtl8xxxu: Fix wifi low signal strength issue of RTL8723BU Chris Chiu
2019-07-04 16:43 ` Jes Sorensen
2019-07-05 2:27 ` Chris Chiu
2019-07-05 18:24 ` Jes Sorensen
2019-07-12 7:25 ` Daniel Drake [this message]
2019-07-05 3:41 ` Daniel Drake
2019-07-05 4:37 ` Chris Chiu
2019-07-24 11:44 ` Kalle Valo
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