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From: Wen Gong <wgong@qti.qualcomm.com>
To: Brian Norris <briannorris@chromium.org>, Wen Gong <wgong@codeaurora.org>
Cc: "linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>,
	"ath10k@lists.infradead.org" <ath10k@lists.infradead.org>
Subject: RE:  [PATCH] ath10k: support PCIe enter L1 state
Date: Thu, 15 Nov 2018 06:38:25 +0000	[thread overview]
Message-ID: <c94346b26a6d4b11a045a176ca854051@aptaiexm02f.ap.qualcomm.com> (raw)
In-Reply-To: <20181115002836.GA71934@google.com>

> -----Original Message-----
> From: ath10k <ath10k-bounces@lists.infradead.org> On Behalf Of Brian
> Norris
> Sent: Thursday, November 15, 2018 8:29 AM
> To: Wen Gong <wgong@codeaurora.org>
> Cc: linux-wireless@vger.kernel.org; ath10k@lists.infradead.org
> Subject: [EXTERNAL] Re: [PATCH] ath10k: support PCIe enter L1 state
> 
> Hi Wen,
> 
> >
> > Signed-off-by: Wen Gong <wgong@codeaurora.org>
> 
> Is there some reason L1 was disabled in the first place? Wa
s it known to be
> unreliable?
> 
Hi Brian,
It is a BUG for power, and it is not considered this BUG before.
So this change will fix the bug.

> Brian
> 
> _______________________________________________
> ath10k mailing list
> ath10k@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/ath10k

  reply	other threads:[~2018-11-15  6:44 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14  2:50 [PATCH] ath10k: support PCIe enter L1 state Wen Gong
2018-11-15  0:28 ` Brian Norris
2018-11-15  6:38   ` Wen Gong [this message]
2018-11-15 18:43     ` Brian Norris
2018-11-16  7:00       ` Kalle Valo
2018-11-16  7:56         ` Michał Kazior
2019-02-08 13:42           ` Kalle Valo
2019-02-08 17:05             ` Brian Norris
2019-03-08  9:42               ` Kalle Valo
2019-12-02 18:48                 ` Brian Norris
2020-02-13 11:15                   ` Kalle Valo

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