From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Gautham R Shenoy <ego@linux.vnet.ibm.com>,
Michael Neuling <mikey@neuling.org>,
maddy@linux.vnet.ibm.com, kvm@vger.kernel.org,
kajoljain <kjain@linux.ibm.com>,
kvm-ppc@vger.kernel.org, svaidyan@in.ibm.com,
Jiri Olsa <jolsa@kernel.org>,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
Date: Fri, 24 Jul 2020 13:55:09 +0530 [thread overview]
Message-ID: <027A2943-661E-4BEE-9EB1-A00AB8DBE7D6@linux.vnet.ibm.com> (raw)
In-Reply-To: <20200723145609.GA1943963@kernel.org>
> On 23-Jul-2020, at 8:26 PM, Arnaldo Carvalho de Melo <acme@kernel.org> wrote:
>
> Em Thu, Jul 23, 2020 at 11:14:16AM +0530, kajoljain escreveu:
>>
>>
>> On 7/21/20 11:32 AM, kajoljain wrote:
>>>
>>>
>>> On 7/17/20 8:08 PM, Athira Rajeev wrote:
>>>> From: Anju T Sudhakar <anju@linux.vnet.ibm.com>
>>>>
>>>> Add support for perf extended register capability in powerpc.
>>>> The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to indicate the
>>>> PMU which support extended registers. The generic code define the mask
>>>> of extended registers as 0 for non supported architectures.
>>>>
>>>> Patch adds extended regs support for power9 platform by
>>>> exposing MMCR0, MMCR1 and MMCR2 registers.
>>>>
>>>> REG_RESERVED mask needs update to include extended regs.
>>>> `PERF_REG_EXTENDED_MASK`, contains mask value of the supported registers,
>>>> is defined at runtime in the kernel based on platform since the supported
>>>> registers may differ from one processor version to another and hence the
>>>> MASK value.
>>>>
>>>> with patch
>>>> ----------
>>>>
>>>> available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11
>>>> r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26
>>>> r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe
>>>> trap dar dsisr sier mmcra mmcr0 mmcr1 mmcr2
>>>>
>>>> PERF_RECORD_SAMPLE(IP, 0x1): 4784/4784: 0 period: 1 addr: 0
>>>> ... intr regs: mask 0xffffffffffff ABI 64-bit
>>>> .... r0 0xc00000000012b77c
>>>> .... r1 0xc000003fe5e03930
>>>> .... r2 0xc000000001b0e000
>>>> .... r3 0xc000003fdcddf800
>>>> .... r4 0xc000003fc7880000
>>>> .... r5 0x9c422724be
>>>> .... r6 0xc000003fe5e03908
>>>> .... r7 0xffffff63bddc8706
>>>> .... r8 0x9e4
>>>> .... r9 0x0
>>>> .... r10 0x1
>>>> .... r11 0x0
>>>> .... r12 0xc0000000001299c0
>>>> .... r13 0xc000003ffffc4800
>>>> .... r14 0x0
>>>> .... r15 0x7fffdd8b8b00
>>>> .... r16 0x0
>>>> .... r17 0x7fffdd8be6b8
>>>> .... r18 0x7e7076607730
>>>> .... r19 0x2f
>>>> .... r20 0xc00000001fc26c68
>>>> .... r21 0xc0002041e4227e00
>>>> .... r22 0xc00000002018fb60
>>>> .... r23 0x1
>>>> .... r24 0xc000003ffec4d900
>>>> .... r25 0x80000000
>>>> .... r26 0x0
>>>> .... r27 0x1
>>>> .... r28 0x1
>>>> .... r29 0xc000000001be1260
>>>> .... r30 0x6008010
>>>> .... r31 0xc000003ffebb7218
>>>> .... nip 0xc00000000012b910
>>>> .... msr 0x9000000000009033
>>>> .... orig_r3 0xc00000000012b86c
>>>> .... ctr 0xc0000000001299c0
>>>> .... link 0xc00000000012b77c
>>>> .... xer 0x0
>>>> .... ccr 0x28002222
>>>> .... softe 0x1
>>>> .... trap 0xf00
>>>> .... dar 0x0
>>>> .... dsisr 0x80000000000
>>>> .... sier 0x0
>>>> .... mmcra 0x80000000000
>>>> .... mmcr0 0x82008090
>>>> .... mmcr1 0x1e000000
>>>> .... mmcr2 0x0
>>>> ... thread: perf:4784
>>>>
>>>> Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com>
>>>> [Defined PERF_REG_EXTENDED_MASK at run time to add support for different platforms ]
>>>> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
>>>> Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
>>>> ---
>>>
>>> Patch looks good to me.
>>>
>>> Reviewed-by: Kajol Jain <kjain@linux.ibm.com>
>>
>> Hi Arnaldo and Jiri,
>> Please let me know if you have any comments on these patches. Can you pull/ack these
>> patches if they seems fine to you.
>
> Can you please clarify something here, I think I saw a kernel build bot
> complaint followed by a fix, in these cases I think, for reviewer's
> sake, that this would entail a v4 patchkit? One that has no such build
> issues?
>
> Or have I got something wrong?
Hi Arnaldo,
yes you are right, I will send version 4 as a new series with changes to add support for extended regs and including fix for the build issue.
Thanks for your response.
Athira
>
> - Arnaldo
next prev parent reply other threads:[~2020-07-24 8:27 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 14:38 [v3 00/15] powerpc/perf: Add support for power10 PMU Hardware Athira Rajeev
2020-07-17 14:38 ` [v3 01/15] powerpc/perf: Update cpu_hw_event to use `struct` for storing MMCR registers Athira Rajeev
2020-07-21 3:42 ` Jordan Niethe
2020-07-22 2:15 ` Athira Rajeev
2020-07-17 14:38 ` [v3 02/15] KVM: PPC: Book3S HV: Cleanup updates for kvm vcpu MMCR Athira Rajeev
2020-07-21 3:54 ` Paul Mackerras
2020-07-22 2:09 ` Athira Rajeev
2020-07-22 4:37 ` Michael Ellerman
2020-07-22 5:49 ` Athira Rajeev
2020-07-22 4:54 ` Paul Mackerras
2020-07-22 6:03 ` Madhavan Srinivasan
2020-07-22 4:38 ` Michael Ellerman
2020-07-17 14:38 ` [v3 03/15] powerpc/perf: Update Power PMU cache_events to u64 type Athira Rajeev
2020-07-17 14:38 ` [v3 04/15] powerpc/perf: Add support for ISA3.1 PMU SPRs Athira Rajeev
2020-07-22 4:18 ` Jordan Niethe
2020-07-22 8:07 ` Athira Rajeev
2020-07-22 10:52 ` Jordan Niethe
2020-07-22 12:03 ` Michael Ellerman
2020-07-17 14:38 ` [v3 05/15] KVM: PPC: Book3S HV: Save/restore new PMU registers Athira Rajeev
2020-07-17 14:38 ` [v3 06/15] powerpc/xmon: Add PowerISA v3.1 PMU SPRs Athira Rajeev
2020-07-17 14:38 ` [v3 07/15] powerpc/perf: Add power10_feat to dt_cpu_ftrs Athira Rajeev
2020-07-22 4:41 ` Jordan Niethe
2020-07-22 7:55 ` Athira Rajeev
2020-07-22 10:39 ` Michael Ellerman
2020-07-22 10:49 ` Jordan Niethe
2020-07-22 12:28 ` Athira Rajeev
2020-07-17 14:38 ` [v3 08/15] powerpc/perf: power10 Performance Monitoring support Athira Rajeev
2020-07-17 14:38 ` [v3 09/15] powerpc/perf: Ignore the BHRB kernel address filtering for P10 Athira Rajeev
2020-07-17 14:38 ` [v3 10/15] powerpc/perf: Add Power10 BHRB filter support for PERF_SAMPLE_BRANCH_IND_CALL/COND Athira Rajeev
2020-07-17 14:38 ` [v3 11/15] powerpc/perf: BHRB control to disable BHRB logic when not used Athira Rajeev
2020-07-20 10:05 ` Gautham R Shenoy
2020-07-23 1:26 ` Jordan Niethe
2020-07-23 1:28 ` Jordan Niethe
2020-07-17 14:38 ` [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs Athira Rajeev
2020-07-19 11:17 ` kernel test robot
2020-07-20 8:09 ` Athira Rajeev
2020-07-21 6:02 ` kajoljain
2020-07-23 5:44 ` kajoljain
2020-07-23 14:56 ` Arnaldo Carvalho de Melo
2020-07-24 8:25 ` Athira Rajeev [this message]
2020-07-24 12:26 ` Ravi Bangoria
2020-07-24 18:13 ` Athira Rajeev
2020-07-17 14:38 ` [v3 13/15] tools/perf: Add perf tools support for extended register capability in powerpc Athira Rajeev
2020-07-21 6:03 ` kajoljain
2020-07-24 11:02 ` Ravi Bangoria
2020-07-24 18:02 ` Athira Rajeev
2020-07-17 14:38 ` [v3 14/15] powerpc/perf: Add extended regs support for power10 platform Athira Rajeev
2020-07-21 6:03 ` kajoljain
2020-07-17 14:38 ` [v3 15/15] tools/perf: Add perf tools support for extended regs in power10 Athira Rajeev
2020-07-21 6:04 ` kajoljain
2020-07-24 13:24 ` [v3 00/15] powerpc/perf: Add support for power10 PMU Hardware Michael Ellerman
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