From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ww0-f45.google.com (mail-ww0-f45.google.com [74.125.82.45]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 77E92B6F7C for ; Tue, 12 Jul 2011 17:48:03 +1000 (EST) Received: by wwj40 with SMTP id 40so3642321wwj.14 for ; Tue, 12 Jul 2011 00:47:57 -0700 (PDT) From: Fabio Baltieri To: Scott Wood , , Subject: [PATCH v2] powerpc/85xx: fix mpic configuration in CAMP mode Date: Tue, 12 Jul 2011 09:49:43 +0200 Message-Id: <1310456983-1473-1-git-send-email-fabio.baltieri@gmail.com> In-Reply-To: <20110711143859.0e6c95d8@schlenkerla.am.freescale.net> References: <20110711143859.0e6c95d8@schlenkerla.am.freescale.net> Cc: Fabio Baltieri , Poonam Aggrwal List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Change the string to check for CAMP mode boot on MPC85xx (eg. P2020) to match the one in the corresponding dts files (p2020rdb_camp_core{0,1}.dts). Without this fix the mpic is configured as in the SMP boot mode, which causes the first core to report a protected source interrupt error for devices of the other core and lock up. Also add MPIC_SINGLE_DEST_CPU on both P2020 based architectures in CAMP mode as suggested by Scott Wood. Thanks. Cc: Scott Wood Cc: Poonam Aggrwal Cc: Benjamin Herrenschmidt Signed-off-by: Fabio Baltieri --- arch/powerpc/platforms/85xx/mpc85xx_ds.c | 3 ++- arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index c7b97f7..1b9a8cf 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -83,7 +83,8 @@ void __init mpc85xx_ds_pic_init(void) if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) { mpic = mpic_alloc(np, r.start, MPIC_PRIMARY | - MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, + MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | + MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC "); } else { mpic = mpic_alloc(np, r.start, diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 088f30b..f5ff911 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c @@ -58,10 +58,11 @@ void __init mpc85xx_rdb_pic_init(void) return; } - if (of_flat_dt_is_compatible(root, "fsl,85XXRDB-CAMP")) { + if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) { mpic = mpic_alloc(np, r.start, MPIC_PRIMARY | - MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, + MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | + MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC "); } else { mpic = mpic_alloc(np, r.start, -- 1.7.5.1