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From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org
Cc: linuxppc-dev@lists.ozlabs.org,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH -V3 08/11] arch/powerpc: Make some of the PGTABLE_RANGE dependency explicit
Date: Mon,  9 Jul 2012 18:43:38 +0530	[thread overview]
Message-ID: <1341839621-28332-9-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1341839621-28332-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>

From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>

slice array size and slice mask size depend on PGTABLE_RANGE. We
can't directly include pgtable.h in these header because there is
a circular dependency. So add compile time check for these values.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/mmu-hash64.h    |   13 ++++++++-----
 arch/powerpc/include/asm/page_64.h       |   17 ++++++++++++++---
 arch/powerpc/include/asm/pgtable-ppc64.h |    8 ++++++++
 arch/powerpc/mm/slice.c                  |   12 ++++++------
 4 files changed, 36 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index 35b74e8..aa0d560 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -419,6 +419,13 @@ extern void slb_set_size(u16 size);
 	srdi	rx,rx,VSID_BITS_##size;	/* extract 2^VSID_BITS bit */	\
 	add	rt,rt,rx
 
+/* 4 bits per slice and we have one slice per 1TB */
+#if 0 /* We can't directly include pgtable.h hence this hack */
+#define SLICE_ARRAY_SIZE  (PGTABLE_RANGE >> 41)
+#else
+/* Right now we only support 64TB */
+#define SLICE_ARRAY_SIZE  32
+#endif
 
 #ifndef __ASSEMBLY__
 
@@ -463,11 +470,7 @@ typedef struct {
 
 #ifdef CONFIG_PPC_MM_SLICES
 	u64 low_slices_psize;	/* SLB page size encodings */
-	/*
-	 * Right now we support 64TB and 4 bits for each
-	 * 1TB slice we need 32 bytes for 64TB.
-	 */
-	unsigned char high_slices_psize[32];  /* 4 bits per slice for now */
+	unsigned char high_slices_psize[SLICE_ARRAY_SIZE];
 #else
 	u16 sllp;		/* SLB page size encoding */
 #endif
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h
index 6c9bef4..141853e 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -78,15 +78,26 @@ extern u64 ppc64_pft_size;
 #define GET_LOW_SLICE_INDEX(addr)	((addr) >> SLICE_LOW_SHIFT)
 #define GET_HIGH_SLICE_INDEX(addr)	((addr) >> SLICE_HIGH_SHIFT)
 
+/* 1 bit per slice and we have one slice per 1TB */
+#if 0 /* We can't directly include pgtable.h hence this hack */
+#define SLICE_MASK_SIZE (PGTABLE_RANG >> 43)
+#else
+/* Right now we support only 64TB */
+#define SLICE_MASK_SIZE 8
+#endif
+
 #ifndef __ASSEMBLY__
 
 struct slice_mask {
 	u16 low_slices;
 	/*
-	 * This should be derived out of PGTABLE_RANGE. For the current
-	 * max 64TB, u64 should be ok.
+	 * We do this as a union so that we can verify
+	 * SLICE_MASK_SIZE against PGTABLE_RANGE
 	 */
-	u64 high_slices;
+	union {
+		u64 high_slices;
+		unsigned char not_used[SLICE_MASK_SIZE];
+	};
 };
 
 struct mm_struct;
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 8af1cf2..dea953f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -32,6 +32,14 @@
 #endif
 #endif
 
+#if (PGTABLE_RANGE >> 41) > SLICE_ARRAY_SIZE
+#error PGTABLE_RANGE exceeds SLICE_ARRAY_SIZE
+#endif
+
+#if (PGTABLE_RANGE >> 43) > SLICE_MASK_SIZE
+#error PGTABLE_RANGE exceeds slice_mask high_slices size
+#endif
+
 /*
  * Define the address range of the kernel non-linear virtual area
  */
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index 302a481..0aa1b2d 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -73,7 +73,7 @@ static struct slice_mask slice_range_to_mask(unsigned long start,
 					     unsigned long len)
 {
 	unsigned long end = start + len - 1;
-	struct slice_mask ret = { 0, 0 };
+	struct slice_mask ret = { 0, {0} };
 
 	if (start < SLICE_LOW_TOP) {
 		unsigned long mend = min(end, SLICE_LOW_TOP);
@@ -123,7 +123,7 @@ static int slice_high_has_vma(struct mm_struct *mm, unsigned long slice)
 
 static struct slice_mask slice_mask_for_free(struct mm_struct *mm)
 {
-	struct slice_mask ret = { 0, 0 };
+	struct slice_mask ret = { 0, {0} };
 	unsigned long i;
 
 	for (i = 0; i < SLICE_NUM_LOW; i++)
@@ -144,7 +144,7 @@ static struct slice_mask slice_mask_for_size(struct mm_struct *mm, int psize)
 {
 	unsigned char *hpsizes;
 	int index, mask_index;
-	struct slice_mask ret = { 0, 0 };
+	struct slice_mask ret = { 0, {0} };
 	unsigned long i;
 	u64 lpsizes;
 
@@ -412,10 +412,10 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
 				      unsigned long flags, unsigned int psize,
 				      int topdown, int use_cache)
 {
-	struct slice_mask mask = {0, 0};
+	struct slice_mask mask = {0, {0} };
 	struct slice_mask good_mask;
-	struct slice_mask potential_mask = {0,0} /* silence stupid warning */;
-	struct slice_mask compat_mask = {0, 0};
+	struct slice_mask potential_mask = {0, {0} } /* silence stupid warning */;
+	struct slice_mask compat_mask = {0, {0} };
 	int fixed = (flags & MAP_FIXED);
 	int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);
 	struct mm_struct *mm = current->mm;
-- 
1.7.10

  parent reply	other threads:[~2012-07-09 13:14 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-09 13:13 [PATCH -V3 0/11] arch/powerpc: Add 64TB support to ppc64 Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 01/11] arch/powerpc: Use hpt_va to compute virtual address Aneesh Kumar K.V
2012-07-22 23:17   ` Paul Mackerras
2012-07-09 13:13 ` [PATCH -V3 02/11] arch/powerpc: Simplify hpte_decode Aneesh Kumar K.V
2012-07-22 23:26   ` Paul Mackerras
2012-07-23  5:41     ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 03/11] arch/powerpc: Convert virtual address to vpn Aneesh Kumar K.V
2012-07-09 22:41   ` Stephen Rothwell
2012-07-10  6:12     ` Aneesh Kumar K.V
2012-07-09 23:06   ` Stephen Rothwell
2012-07-10  6:15     ` Aneesh Kumar K.V
2012-07-22 23:42   ` Paul Mackerras
2012-07-23  5:54     ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 04/11] arch/powerpc: Rename va " Aneesh Kumar K.V
2012-07-22 23:46   ` Paul Mackerras
2012-07-23  6:14     ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 05/11] arch/powerpc: remove masking top 16 bit of va in tlb invalidate Aneesh Kumar K.V
2012-07-22 23:56   ` Paul Mackerras
2012-07-23  1:22     ` Benjamin Herrenschmidt
2012-07-23  3:49       ` Paul Mackerras
2012-07-23  6:44         ` Aneesh Kumar K.V
2012-07-23  6:48           ` Benjamin Herrenschmidt
2012-07-09 13:13 ` [PATCH -V3 06/11] arch/powerpc: Make KERN_VIRT_SIZE not dependend on PGTABLE_RANGE Aneesh Kumar K.V
2012-07-22 23:57   ` Paul Mackerras
2012-07-09 13:13 ` [PATCH -V3 07/11] arch/powerpc: Increase the slice range to 64TB Aneesh Kumar K.V
2012-07-23  0:00   ` Paul Mackerras
2012-07-23  7:13     ` Aneesh Kumar K.V
2012-07-09 13:13 ` Aneesh Kumar K.V [this message]
2012-07-23  0:20   ` [PATCH -V3 08/11] arch/powerpc: Make some of the PGTABLE_RANGE dependency explicit Paul Mackerras
2012-07-23  7:29     ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 09/11] arch/powerpc: Use 50 bits of VSID in slbmte Aneesh Kumar K.V
2012-07-23  0:06   ` Paul Mackerras
2012-07-23  8:21     ` Aneesh Kumar K.V
2012-07-23  9:36       ` Paul Mackerras
2012-07-23 10:22         ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 10/11] arch/powerpc: Use 32bit array for slb cache Aneesh Kumar K.V
2012-07-23  0:27   ` Paul Mackerras
2012-07-23  8:25     ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 11/11] arch/powerpc: Add 64TB support Aneesh Kumar K.V
2012-07-23  0:15   ` Paul Mackerras
2012-07-23  8:49     ` Aneesh Kumar K.V
2012-07-23  9:39   ` Paul Mackerras
2012-07-23 10:22     ` Aneesh Kumar K.V
2012-07-23 11:06       ` Paul Mackerras
2012-07-24  8:37         ` Aneesh Kumar K.V
2012-07-24  9:14           ` Aneesh Kumar K.V
2012-07-24 19:50             ` Aneesh Kumar K.V

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