From: Michael Neuling <mikey@neuling.org>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Neuling <mikey@neuling.org>,
linuxppc-dev@lists.ozlabs.org, Matt Evans <matt@ozlabs.org>
Subject: [PATCH 04/17] powerpc: New macros for transactional memory support
Date: Fri, 18 Jan 2013 16:48:24 +1100 [thread overview]
Message-ID: <1358488117-17363-5-git-send-email-mikey@neuling.org> (raw)
In-Reply-To: <1358488117-17363-1-git-send-email-mikey@neuling.org>
This adds new macros for saving and restoring checkpointed architected state
from and to the thread_struct.
It also adds some debugging macros for when your brain explodes trying to debug
your transactional memory enabled kernel.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc_asm.h | 83 ++++++++++++++++++++++++++++++++++
arch/powerpc/include/asm/processor.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 24 ++++++++++
arch/powerpc/kernel/fpu.S | 12 +++++
arch/powerpc/kernel/process.c | 10 ++++
arch/powerpc/kernel/traps.c | 11 +++++
6 files changed, 141 insertions(+)
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index c2d0e58..54219ce 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -123,6 +123,89 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
+/* Save/restore FPRs, VRs and VSRs from their checkpointed backups in
+ * thread_struct:
+ */
+#define SAVE_FPR_TRANSACT(n, base) stfd n,THREAD_TRANSACT_FPR0+ \
+ 8*TS_FPRWIDTH*(n)(base)
+#define SAVE_2FPRS_TRANSACT(n, base) SAVE_FPR_TRANSACT(n, base); \
+ SAVE_FPR_TRANSACT(n+1, base)
+#define SAVE_4FPRS_TRANSACT(n, base) SAVE_2FPRS_TRANSACT(n, base); \
+ SAVE_2FPRS_TRANSACT(n+2, base)
+#define SAVE_8FPRS_TRANSACT(n, base) SAVE_4FPRS_TRANSACT(n, base); \
+ SAVE_4FPRS_TRANSACT(n+4, base)
+#define SAVE_16FPRS_TRANSACT(n, base) SAVE_8FPRS_TRANSACT(n, base); \
+ SAVE_8FPRS_TRANSACT(n+8, base)
+#define SAVE_32FPRS_TRANSACT(n, base) SAVE_16FPRS_TRANSACT(n, base); \
+ SAVE_16FPRS_TRANSACT(n+16, base)
+
+#define REST_FPR_TRANSACT(n, base) lfd n,THREAD_TRANSACT_FPR0+ \
+ 8*TS_FPRWIDTH*(n)(base)
+#define REST_2FPRS_TRANSACT(n, base) REST_FPR_TRANSACT(n, base); \
+ REST_FPR_TRANSACT(n+1, base)
+#define REST_4FPRS_TRANSACT(n, base) REST_2FPRS_TRANSACT(n, base); \
+ REST_2FPRS_TRANSACT(n+2, base)
+#define REST_8FPRS_TRANSACT(n, base) REST_4FPRS_TRANSACT(n, base); \
+ REST_4FPRS_TRANSACT(n+4, base)
+#define REST_16FPRS_TRANSACT(n, base) REST_8FPRS_TRANSACT(n, base); \
+ REST_8FPRS_TRANSACT(n+8, base)
+#define REST_32FPRS_TRANSACT(n, base) REST_16FPRS_TRANSACT(n, base); \
+ REST_16FPRS_TRANSACT(n+16, base)
+
+
+#define SAVE_VR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VR0+(16*(n)); \
+ stvx n,b,base
+#define SAVE_2VRS_TRANSACT(n,b,base) SAVE_VR_TRANSACT(n,b,base); \
+ SAVE_VR_TRANSACT(n+1,b,base)
+#define SAVE_4VRS_TRANSACT(n,b,base) SAVE_2VRS_TRANSACT(n,b,base); \
+ SAVE_2VRS_TRANSACT(n+2,b,base)
+#define SAVE_8VRS_TRANSACT(n,b,base) SAVE_4VRS_TRANSACT(n,b,base); \
+ SAVE_4VRS_TRANSACT(n+4,b,base)
+#define SAVE_16VRS_TRANSACT(n,b,base) SAVE_8VRS_TRANSACT(n,b,base); \
+ SAVE_8VRS_TRANSACT(n+8,b,base)
+#define SAVE_32VRS_TRANSACT(n,b,base) SAVE_16VRS_TRANSACT(n,b,base); \
+ SAVE_16VRS_TRANSACT(n+16,b,base)
+
+#define REST_VR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VR0+(16*(n)); \
+ lvx n,b,base
+#define REST_2VRS_TRANSACT(n,b,base) REST_VR_TRANSACT(n,b,base); \
+ REST_VR_TRANSACT(n+1,b,base)
+#define REST_4VRS_TRANSACT(n,b,base) REST_2VRS_TRANSACT(n,b,base); \
+ REST_2VRS_TRANSACT(n+2,b,base)
+#define REST_8VRS_TRANSACT(n,b,base) REST_4VRS_TRANSACT(n,b,base); \
+ REST_4VRS_TRANSACT(n+4,b,base)
+#define REST_16VRS_TRANSACT(n,b,base) REST_8VRS_TRANSACT(n,b,base); \
+ REST_8VRS_TRANSACT(n+8,b,base)
+#define REST_32VRS_TRANSACT(n,b,base) REST_16VRS_TRANSACT(n,b,base); \
+ REST_16VRS_TRANSACT(n+16,b,base)
+
+
+#define SAVE_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
+ STXVD2X(n,R##base,R##b)
+#define SAVE_2VSRS_TRANSACT(n,b,base) SAVE_VSR_TRANSACT(n,b,base); \
+ SAVE_VSR_TRANSACT(n+1,b,base)
+#define SAVE_4VSRS_TRANSACT(n,b,base) SAVE_2VSRS_TRANSACT(n,b,base); \
+ SAVE_2VSRS_TRANSACT(n+2,b,base)
+#define SAVE_8VSRS_TRANSACT(n,b,base) SAVE_4VSRS_TRANSACT(n,b,base); \
+ SAVE_4VSRS_TRANSACT(n+4,b,base)
+#define SAVE_16VSRS_TRANSACT(n,b,base) SAVE_8VSRS_TRANSACT(n,b,base); \
+ SAVE_8VSRS_TRANSACT(n+8,b,base)
+#define SAVE_32VSRS_TRANSACT(n,b,base) SAVE_16VSRS_TRANSACT(n,b,base); \
+ SAVE_16VSRS_TRANSACT(n+16,b,base)
+
+#define REST_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
+ LXVD2X(n,R##base,R##b)
+#define REST_2VSRS_TRANSACT(n,b,base) REST_VSR_TRANSACT(n,b,base); \
+ REST_VSR_TRANSACT(n+1,b,base)
+#define REST_4VSRS_TRANSACT(n,b,base) REST_2VSRS_TRANSACT(n,b,base); \
+ REST_2VSRS_TRANSACT(n+2,b,base)
+#define REST_8VSRS_TRANSACT(n,b,base) REST_4VSRS_TRANSACT(n,b,base); \
+ REST_4VSRS_TRANSACT(n+4,b,base)
+#define REST_16VSRS_TRANSACT(n,b,base) REST_8VSRS_TRANSACT(n,b,base); \
+ REST_8VSRS_TRANSACT(n+8,b,base)
+#define REST_32VSRS_TRANSACT(n,b,base) REST_16VSRS_TRANSACT(n,b,base); \
+ REST_16VSRS_TRANSACT(n+16,b,base)
+
/* Save the lower 32 VSRs in the thread VSR region */
#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,R##base,R##b)
#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 1ffed17..af420e8 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -152,6 +152,7 @@ typedef struct {
#define TS_FPROFFSET 0
#define TS_VSRLOWOFFSET 1
#define TS_FPR(i) fpr[i][TS_FPROFFSET]
+#define TS_TRANS_FPR(i) transact_fpr[i][TS_FPROFFSET]
struct thread_struct {
unsigned long ksp; /* Kernel stack pointer */
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index e39ca55..3b81960 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -122,6 +122,30 @@ int main(void)
DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
#endif
+#ifdef CONFIG_TRANSACTIONAL_MEM
+ DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
+ DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
+ DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
+ DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
+ DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct,
+ transact_vr[0]));
+ DEFINE(THREAD_TRANSACT_VSCR, offsetof(struct thread_struct,
+ transact_vscr));
+ DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
+ transact_vrsave));
+ DEFINE(THREAD_TRANSACT_FPR0, offsetof(struct thread_struct,
+ transact_fpr[0]));
+ DEFINE(THREAD_TRANSACT_FPSCR, offsetof(struct thread_struct,
+ transact_fpscr));
+#ifdef CONFIG_VSX
+ DEFINE(THREAD_TRANSACT_VSR0, offsetof(struct thread_struct,
+ transact_fpr[0]));
+#endif
+ /* Local pt_regs on stack for Transactional Memory funcs. */
+ DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
+ sizeof(struct pt_regs) + 16);
+#endif /* CONFIG_TRANSACTIONAL_MEM */
+
DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index e0ada05..adb1551 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -35,6 +35,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
2: REST_32VSRS(n,c,base); \
3:
+#define __REST_32FPVSRS_TRANSACT(n,c,base) \
+BEGIN_FTR_SECTION \
+ b 2f; \
+END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
+ REST_32FPRS_TRANSACT(n,base); \
+ b 3f; \
+2: REST_32VSRS_TRANSACT(n,c,base); \
+3:
+
#define __SAVE_32FPVSRS(n,c,base) \
BEGIN_FTR_SECTION \
b 2f; \
@@ -45,9 +54,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
3:
#else
#define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
+#define __REST_32FPVSRS_TRANSACT(n,b,base) REST_32FPRS(n, base)
#define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
#endif
#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
+#define REST_32FPVSRS_TRANSACT(n,c,base) \
+ __REST_32FPVSRS_TRANSACT(n,__REG_##c,__REG_##base)
#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)
/*
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 99550d3..1ab3a2c 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -57,6 +57,16 @@
#include <linux/kprobes.h>
#include <linux/kdebug.h>
+#ifdef CONFIG_TRANSACTIONAL_MEM
+/* Transactional Memory debug */
+// #define TM_DEBUG_SW
+#ifdef TM_DEBUG_SW
+#define TM_DEBUG(x...) printk(KERN_INFO x)
+#else
+#define TM_DEBUG(x...) do { } while(0)
+#endif
+#endif
+
extern unsigned long _get_SP(void);
#ifndef CONFIG_SMP
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index a008cf5..2a62f54 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -78,6 +78,16 @@ EXPORT_SYMBOL(__debugger_break_match);
EXPORT_SYMBOL(__debugger_fault_handler);
#endif
+#ifdef CONFIG_TRANSACTIONAL_MEM
+/* Transactional Memory trap debug */
+// #define TM_DEBUG_SW
+#ifdef TM_DEBUG_SW
+#define TM_DEBUG(x...) printk(KERN_INFO x)
+#else
+#define TM_DEBUG(x...) do { } while(0)
+#endif
+#endif
+
/*
* Trap & Exception support
*/
@@ -350,6 +360,7 @@ static inline int check_io_access(struct pt_regs *regs)
exception is in the MSR. */
#define get_reason(regs) ((regs)->msr)
#define get_mc_reason(regs) ((regs)->msr)
+#define REASON_TM 0x200000
#define REASON_FP 0x100000
#define REASON_ILLEGAL 0x80000
#define REASON_PRIVILEGED 0x40000
--
1.7.10.4
next prev parent reply other threads:[~2013-01-18 5:48 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-27 2:47 [PATCH 00/16] powerpc: Hardware transactional memory support for POWER8 Michael Neuling
2012-11-27 2:47 ` [PATCH 01/16] powerpc: Add new CPU feature bit for transactional memory Michael Neuling
2012-11-27 2:47 ` [PATCH 02/16] powerpc: Add new instructions " Michael Neuling
2012-11-27 2:47 ` [PATCH 03/16] powerpc: Add additional state needed for transactional memory to thread struct Michael Neuling
2012-11-27 2:47 ` [PATCH 04/16] powerpc: New macros for transactional memory support Michael Neuling
2012-11-27 2:47 ` [PATCH 05/16] powerpc: Register defines for various transactional memory registers Michael Neuling
2012-11-27 2:47 ` [PATCH 06/16] powerpc: Add transactional memory paca scratch register to show_regs Michael Neuling
2012-11-27 2:47 ` [PATCH 07/16] powerpc: Add helper functions for transactional memory context switching Michael Neuling
2012-11-27 2:48 ` [PATCH 08/16] powerpc: Add FP/VSX and VMX register load functions for transactional memory Michael Neuling
2012-11-27 2:48 ` [PATCH 09/16] powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes Michael Neuling
2012-11-27 2:48 ` [PATCH 10/16] powerpc: Add transactional memory unavaliable execption handler Michael Neuling
2012-11-27 2:48 ` [PATCH 11/16] powerpc: Assembler routines for FP/VSX/VMX unavailable during a transaction Michael Neuling
2012-11-27 2:48 ` [PATCH 12/16] powerpc: Hook in new transactional memory code Michael Neuling
2012-11-27 2:48 ` [PATCH 13/16] powerpc: Add transactional memory to POWER8 cpu features Michael Neuling
2012-11-27 2:48 ` [PATCH 14/16] powerpc: Add config option for transactional memory Michael Neuling
2012-11-27 2:48 ` [PATCH 15/16] powerpc: Add transactional memory to pseries and ppc64 defconfigs Michael Neuling
2012-11-27 2:48 ` [PATCH 16/16] powerpc: Documentation for transactional memory on powerpc Michael Neuling
2013-01-18 5:48 ` [PATCH 00/17] powerpc: Hardware transactional memory support for POWER8 Michael Neuling
2013-01-18 5:48 ` [PATCH 01/17] powerpc: Add new CPU feature bit for transactional memory Michael Neuling
2013-01-18 5:48 ` [PATCH 02/17] powerpc: Add new instructions " Michael Neuling
2013-01-18 5:48 ` [PATCH 03/17] powerpc: Add additional state needed for transactional memory to thread struct Michael Neuling
2013-01-18 5:48 ` Michael Neuling [this message]
2013-01-18 5:48 ` [PATCH 05/17] powerpc: Register defines for various transactional memory registers Michael Neuling
2013-01-18 5:48 ` [PATCH 06/17] powerpc: Add transactional memory paca scratch register to show_regs Michael Neuling
2013-01-18 5:48 ` [PATCH 07/17] powerpc: Add helper functions for transactional memory context switching Michael Neuling
2013-01-18 5:48 ` [PATCH 08/17] powerpc: Add FP/VSX and VMX register load functions for transactional memory Michael Neuling
2013-01-18 5:48 ` [PATCH 09/17] powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes Michael Neuling
2013-01-18 5:48 ` [PATCH 10/17] powerpc: Add transactional memory unavaliable execption handler Michael Neuling
2013-01-18 5:48 ` [PATCH 11/17] powerpc: Assembler routines for FP/VSX/VMX unavailable during a transaction Michael Neuling
2013-01-18 5:48 ` [PATCH 12/17] powerpc: Hook in new transactional memory code Michael Neuling
2013-01-18 5:48 ` [PATCH 13/17] powerpc: Add new transactional memory state to the signal context Michael Neuling
2013-01-18 5:48 ` [PATCH 14/17] powerpc: Add transactional memory to POWER8 cpu features Michael Neuling
2013-01-18 5:48 ` [PATCH 15/17] powerpc: Add config option for transactional memory Michael Neuling
2013-01-18 5:48 ` [PATCH 16/17] powerpc: Add transactional memory to pseries and ppc64 defconfigs Michael Neuling
2013-01-18 5:48 ` [PATCH 17/17] powerpc: Documentation for transactional memory on powerpc Michael Neuling
2013-02-13 4:31 ` [PATCH 00/17] powerpc: Hardware transactional memory support for POWER8 Michael Neuling
2013-02-13 4:31 ` [PATCH 01/17] powerpc: Add new CPU feature bit for transactional memory Michael Neuling
2013-02-13 4:31 ` [PATCH 02/17] powerpc: Add new instructions " Michael Neuling
2013-02-13 4:31 ` [PATCH 03/17] powerpc: Add additional state needed for transactional memory to thread struct Michael Neuling
2013-02-13 4:31 ` [PATCH 04/17] powerpc: New macros for transactional memory support Michael Neuling
2013-02-13 4:31 ` [PATCH 05/17] powerpc: Register defines for various transactional memory registers Michael Neuling
2013-02-13 4:31 ` [PATCH 06/17] powerpc: Add transactional memory paca scratch register to show_regs Michael Neuling
2013-02-13 13:52 ` Kumar Gala
2013-02-14 1:53 ` Michael Neuling
2013-02-13 4:31 ` [PATCH 07/17] powerpc: Add helper functions for transactional memory context switching Michael Neuling
2013-02-13 4:31 ` [PATCH 08/17] powerpc: Add FP/VSX and VMX register load functions for transactional memory Michael Neuling
2013-02-13 13:54 ` Kumar Gala
2013-02-14 1:53 ` Michael Neuling
2013-02-13 4:31 ` [PATCH 09/17] powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes Michael Neuling
2013-02-13 4:31 ` [PATCH 10/17] powerpc: Add transactional memory unavaliable execption handler Michael Neuling
2013-02-13 4:31 ` [PATCH 11/17] powerpc: Routines for FP/VSX/VMX unavailable during a transaction Michael Neuling
2013-02-13 4:31 ` [PATCH 12/17] powerpc: Hook in new transactional memory code Michael Neuling
2013-02-13 4:31 ` [PATCH 13/17] powerpc: Add new transactional memory state to the signal context Michael Neuling
2013-02-13 4:31 ` [PATCH 14/17] powerpc: Add transactional memory to POWER8 cpu features Michael Neuling
2013-02-13 4:31 ` [PATCH 15/17] powerpc: Add config option for transactional memory Michael Neuling
2013-02-13 14:02 ` Kumar Gala
2013-02-14 1:52 ` Michael Neuling
2013-02-13 4:31 ` [PATCH 16/17] powerpc: Add transactional memory to pseries and ppc64 defconfigs Michael Neuling
2013-02-13 4:31 ` [PATCH 17/17] powerpc: Documentation for transactional memory on powerpc Michael Neuling
2013-02-14 2:21 ` [PATCH 00/17] powerpc: Hardware transactional memory support for POWER8 Michael Neuling
2013-02-14 2:21 ` [PATCH 01/17] powerpc: Add new CPU feature bit for transactional memory Michael Neuling
2013-02-14 2:21 ` [PATCH 02/17] powerpc: Add new instructions " Michael Neuling
2013-02-14 2:21 ` [PATCH 03/17] powerpc: Add additional state needed for transactional memory to thread struct Michael Neuling
2013-02-14 2:21 ` [PATCH 04/17] powerpc: New macros for transactional memory support Michael Neuling
2013-02-14 2:21 ` [PATCH 05/17] powerpc: Register defines for various transactional memory registers Michael Neuling
2013-02-14 2:21 ` [PATCH 06/17] powerpc: Add transactional memory paca scratch register to show_regs Michael Neuling
2013-02-14 2:21 ` [PATCH 07/17] powerpc: Add helper functions for transactional memory context switching Michael Neuling
2013-02-14 2:21 ` [PATCH 08/17] powerpc: Add FP/VSX and VMX register load functions for transactional memory Michael Neuling
2013-02-14 2:21 ` [PATCH 09/17] powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes Michael Neuling
2013-02-14 2:21 ` [PATCH 10/17] powerpc: Add transactional memory unavaliable execption handler Michael Neuling
2013-02-14 2:21 ` [PATCH 11/17] powerpc: Routines for FP/VSX/VMX unavailable during a transaction Michael Neuling
2013-02-14 2:21 ` [PATCH 12/17] powerpc: Hook in new transactional memory code Michael Neuling
2013-02-14 2:21 ` [PATCH 13/17] powerpc: Add new transactional memory state to the signal context Michael Neuling
2013-02-14 2:21 ` [PATCH 14/17] powerpc: Add transactional memory to POWER8 cpu features Michael Neuling
2013-02-14 2:21 ` [PATCH 15/17] powerpc: Add config option for transactional memory Michael Neuling
2013-02-14 2:21 ` [PATCH 16/17] powerpc: Add transactional memory to pseries and ppc64 defconfigs Michael Neuling
2013-02-14 2:21 ` [PATCH 17/17] powerpc: Documentation for transactional memory on powerpc Michael Neuling
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