linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Sandeep Singh <Sandeep@freescale.com>
To: <linuxppc-dev@lists.ozlabs.org>, <linux-arm-kernel@lists.infradead.org>
Cc: Sandeep Singh <Sandeep@freescale.com>,
	Poonam Aggrwal <poonam.aggrwal@freescale.com>
Subject: [PATCH 3/4] TDM Device Tree entries for various Freescale Platforms
Date: Thu, 7 Mar 2013 16:57:47 +0530	[thread overview]
Message-ID: <1362655668-26721-3-git-send-email-Sandeep@freescale.com> (raw)
In-Reply-To: <1362655668-26721-1-git-send-email-Sandeep@freescale.com>

P1010RDB, P1020RDB, P1020MBG-PC, P1022DS, P1020RDB-PC and P1024RDB

In this Patch:
 1. TDM node included in <silicon>.dtsi files.
 2. Disabled TDM in 36bit configurations because of limitations
    in TDM hardware block, details mentioned below.

Details of 36bit h/w limitaion:
 ---------------------------------
TDM DMAC IP does not support more than 32b address. To address memory regions
more than 4GB, 4 bits of address were provided in GUTs, which are appended to
txns initiated by TDM DMAC. These 4 bits are appended irrespective of the
region addressed. When TDM works in DMA mode, the DMA need to access DDR as
well as TDM FIFO in CCSR space. So this poses a restriction that if memory
region above 4GB need to be accessed, CCSR space should also be mapped into
that 4GB region.
In this case DDR is at at first 4G (starting from 0) and CCSR is at
 different 4G (0xfffe00000), hence the issue.

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
 arch/powerpc/boot/dts/fsl/p1010si-post.dtsi |    3 ++-
 arch/powerpc/boot/dts/fsl/p1020si-post.dtsi |    1 +
 arch/powerpc/boot/dts/fsl/p1022si-post.dtsi |    1 +
 arch/powerpc/boot/dts/p1010rdb_36b.dts      |    3 +++
 arch/powerpc/boot/dts/p1020mbg-pc_36b.dts   |    3 +++
 arch/powerpc/boot/dts/p1020rdb-pc_36b.dts   |    3 +++
 arch/powerpc/boot/dts/p1020rdb_36b.dts      |    3 +++
 arch/powerpc/boot/dts/p1022ds_36b.dts       |    3 +++
 arch/powerpc/boot/dts/p1024rdb_36b.dts      |    3 +++
 9 files changed, 22 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index 0bde9ee..15c74a2 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * P1010/P1014 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -132,6 +132,7 @@
 /include/ "pq3-gpio-0.dtsi"
 /include/ "pq3-sata2-0.dtsi"
 /include/ "pq3-sata2-1.dtsi"
+/include/ "pq3-tdm1.0-0.dtsi"
 
 	can0: can@1c000 {
 		compatible = "fsl,p1010-flexcan";
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
index 68cc5e7..684f664 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -131,6 +131,7 @@
 	};
 
 /include/ "pq3-gpio-0.dtsi"
+/include/ "pq3-tdm1.0-0.dtsi"
 
 	L2: l2-cache-controller@20000 {
 		compatible = "fsl,p1020-l2-cache-controller";
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
index 06216b8..4016e45 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -190,6 +190,7 @@
 		fsl,fifo-depth = <15>;
 	};
 
+/include/ "pq3-tdm1.0-0.dtsi"
 /include/ "pq3-sata2-0.dtsi"
 /include/ "pq3-sata2-1.dtsi"
 
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dts b/arch/powerpc/boot/dts/p1010rdb_36b.dts
index 64776f4..e159b42 100644
--- a/arch/powerpc/boot/dts/p1010rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1010rdb_36b.dts
@@ -52,6 +52,9 @@
 
 	board_soc: soc: soc@fffe00000 {
 		ranges = <0x0 0xf 0xffe00000 0x100000>;
+		tdm@16000 {
+			status = "disabled";
+		};
 	};
 
 	pci0: pcie@fffe09000 {
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
index 9e9f401..416e1a7 100644
--- a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
+++ b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
@@ -52,6 +52,9 @@
 
 	soc: soc@fffe00000 {
 		ranges = <0x0 0xf 0xffe00000 0x100000>;
+		tdm@16000 {
+			status = "disabled";
+		};
 	};
 
 	pci0: pcie@fffe09000 {
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
index 5237da7..a1861d6 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
+++ b/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
@@ -53,6 +53,9 @@
 
 	soc: soc@fffe00000 {
 		ranges = <0x0 0xf 0xffe00000 0x100000>;
+		tdm@16000 {
+			status = "disabled";
+		};
 	};
 
 	pci0: pcie@fffe09000 {
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts b/arch/powerpc/boot/dts/p1020rdb_36b.dts
index bdbdb60..7bac196 100644
--- a/arch/powerpc/boot/dts/p1020rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1020rdb_36b.dts
@@ -29,6 +29,9 @@
 
 	board_soc: soc: soc@fffe00000 {
 		ranges = <0x0 0xf 0xffe00000 0x100000>;
+		tdm@16000 {
+			status = "disabled";
+		};
 	};
 
 	pci0: pcie@fffe09000 {
diff --git a/arch/powerpc/boot/dts/p1022ds_36b.dts b/arch/powerpc/boot/dts/p1022ds_36b.dts
index f7aacce..024ea40 100644
--- a/arch/powerpc/boot/dts/p1022ds_36b.dts
+++ b/arch/powerpc/boot/dts/p1022ds_36b.dts
@@ -51,6 +51,9 @@
 
 	board_soc: soc: soc@fffe00000 {
 		ranges = <0x0 0xf 0xffe00000 0x100000>;
+		tdm@16000 {
+			status = "disabled";
+		};
 	};
 
 	pci0: pcie@fffe09000 {
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
index 3656825..b113229 100644
--- a/arch/powerpc/boot/dts/p1024rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
@@ -49,6 +49,9 @@
 
 	soc: soc@fffe00000 {
 		ranges = <0x0 0xf 0xffe00000 0x100000>;
+		tdm@16000 {
+			status = "disabled";
+		};
 	};
 
 	pci0: pcie@fffe09000 {
-- 
1.7.6.GIT

  parent reply	other threads:[~2013-03-07 11:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-07 11:27 [PATCH 1/4] Device tree entry for Freescale TDM controller Sandeep Singh
2013-03-07 11:27 ` [PATCH 2/4] Device Tree bindings " Sandeep Singh
2013-03-07 11:27 ` Sandeep Singh [this message]
2013-03-08 16:47   ` [PATCH 3/4] TDM Device Tree entries for various Freescale Platforms Timur Tabi
2013-03-08 16:47     ` Timur Tabi
2013-03-11  9:27     ` Singh Sandeep-B37400
2013-03-07 11:27 ` [PATCH 4/4] Added device tree entries for Legerity SLIC node on " Sandeep Singh
2013-07-30 22:40   ` [4/4] " Scott Wood
2013-03-07 13:34 ` [PATCH 1/4] Device tree entry for Freescale TDM controller Russell King - ARM Linux
2013-03-13  5:17   ` Singh Sandeep-B37400
2013-03-20 10:51 ` Singh Sandeep-B37400
2013-03-29  9:34   ` Singh Sandeep-B37400
2013-06-28 22:15 ` [1/4] " Scott Wood
2013-07-01  4:59   ` Singh Sandeep-B37400

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1362655668-26721-3-git-send-email-Sandeep@freescale.com \
    --to=sandeep@freescale.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=poonam.aggrwal@freescale.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).