From: Anton Blanchard <anton@samba.org>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 05/39] powerpc: Little endian builds double word swap VSX state during context save/restore
Date: Mon, 23 Sep 2013 12:04:39 +1000 [thread overview]
Message-ID: <1379901913-5945-6-git-send-email-anton@samba.org> (raw)
In-Reply-To: <1379901913-5945-1-git-send-email-anton@samba.org>
The elements within VSX loads and stores are big endian ordered
regardless of endianness. Our VSX context save/restore code uses
lxvd2x and stxvd2x which is a 2x doubleword operation. This means
the two doublewords will be swapped and we have to perform another
swap to undo it.
We need to do this on save and restore.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
arch/powerpc/include/asm/ppc-opcode.h | 3 +++
arch/powerpc/include/asm/ppc_asm.h | 21 +++++++++++++++++----
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index d7fe9f5..ad5fcf5 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -181,6 +181,7 @@
#define PPC_INST_TLBIVAX 0x7c000624
#define PPC_INST_TLBSRX_DOT 0x7c0006a5
#define PPC_INST_XXLOR 0xf0000510
+#define PPC_INST_XXSWAPD 0xf0000250
#define PPC_INST_XVCPSGNDP 0xf0000780
#define PPC_INST_TRECHKPT 0x7c0007dd
#define PPC_INST_TRECLAIM 0x7c00075d
@@ -344,6 +345,8 @@
VSX_XX1((s), a, b))
#define XXLOR(t, a, b) stringify_in_c(.long PPC_INST_XXLOR | \
VSX_XX3((t), a, b))
+#define XXSWAPD(t, a) stringify_in_c(.long PPC_INST_XXSWAPD | \
+ VSX_XX3((t), a, a))
#define XVCPSGNDP(t, a, b) stringify_in_c(.long (PPC_INST_XVCPSGNDP | \
VSX_XX3((t), (a), (b))))
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 5995457..0c51fb4 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -180,9 +180,20 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
#define REST_32VRS_TRANSACT(n,b,base) REST_16VRS_TRANSACT(n,b,base); \
REST_16VRS_TRANSACT(n+16,b,base)
+#ifdef __BIG_ENDIAN__
+#define STXVD2X_ROT(n,b,base) STXVD2X(n,b,base)
+#define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base)
+#else
+#define STXVD2X_ROT(n,b,base) XXSWAPD(n,n); \
+ STXVD2X(n,b,base); \
+ XXSWAPD(n,n)
+
+#define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base); \
+ XXSWAPD(n,n)
+#endif
#define SAVE_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
- STXVD2X(n,R##base,R##b)
+ STXVD2X_ROT(n,R##base,R##b)
#define SAVE_2VSRS_TRANSACT(n,b,base) SAVE_VSR_TRANSACT(n,b,base); \
SAVE_VSR_TRANSACT(n+1,b,base)
#define SAVE_4VSRS_TRANSACT(n,b,base) SAVE_2VSRS_TRANSACT(n,b,base); \
@@ -195,7 +206,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
SAVE_16VSRS_TRANSACT(n+16,b,base)
#define REST_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
- LXVD2X(n,R##base,R##b)
+ LXVD2X_ROT(n,R##base,R##b)
#define REST_2VSRS_TRANSACT(n,b,base) REST_VSR_TRANSACT(n,b,base); \
REST_VSR_TRANSACT(n+1,b,base)
#define REST_4VSRS_TRANSACT(n,b,base) REST_2VSRS_TRANSACT(n,b,base); \
@@ -208,13 +219,15 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
REST_16VSRS_TRANSACT(n+16,b,base)
/* Save the lower 32 VSRs in the thread VSR region */
-#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,R##base,R##b)
+#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); \
+ STXVD2X_ROT(n,R##base,R##b)
#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base)
#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base)
#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base)
#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base)
-#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,R##base,R##b)
+#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); \
+ LXVD2X_ROT(n,R##base,R##b)
#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base)
#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base)
#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)
--
1.8.1.2
next prev parent reply other threads:[~2013-09-23 2:04 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-23 2:04 [PATCH 00/39] Second round of 64bit PowerPC little endian patches Anton Blanchard
2013-09-23 2:04 ` [PATCH 01/39] powerpc: Fix endian issues in VMX copy loops Anton Blanchard
2013-09-23 2:04 ` [PATCH 02/39] powerpc: Book 3S MMU little endian support Anton Blanchard
2013-09-23 2:04 ` [PATCH 03/39] powerpc: Fix offset of FPRs in VSX registers in little endian builds Anton Blanchard
2013-09-23 2:04 ` [PATCH 04/39] powerpc: PTRACE_PEEKUSR/PTRACE_POKEUSER of FPR " Anton Blanchard
2013-09-23 2:04 ` Anton Blanchard [this message]
2013-09-23 2:04 ` [PATCH 06/39] powerpc: Support endian agnostic MMIO Anton Blanchard
2013-09-23 2:04 ` [PATCH 07/39] powerpc: Add little endian support for word-at-a-time functions Anton Blanchard
2013-09-23 2:04 ` [PATCH 08/39] powerpc: Set MSR_LE bit on little endian builds Anton Blanchard
2013-09-23 2:04 ` [PATCH 09/39] powerpc: Reset MSR_LE on signal entry Anton Blanchard
2013-09-23 2:04 ` [PATCH 10/39] powerpc: Include the appropriate endianness header Anton Blanchard
2013-09-23 2:04 ` [PATCH 11/39] powerpc: endian safe trampoline Anton Blanchard
2013-12-28 7:24 ` Olof Johansson
2013-12-28 7:58 ` Benjamin Herrenschmidt
2013-09-23 2:04 ` [PATCH 12/39] powerpc: Remove open coded byte swap macro in alignment handler Anton Blanchard
2013-09-23 2:04 ` [PATCH 13/39] powerpc: Remove hard coded FP offsets " Anton Blanchard
2013-09-23 2:04 ` [PATCH 14/39] powerpc: Alignment handler shouldn't access VSX registers with TS_FPR Anton Blanchard
2013-09-23 2:04 ` [PATCH 15/39] powerpc: Add little endian support to alignment handler Anton Blanchard
2013-09-23 2:04 ` [PATCH 16/39] powerpc: Handle VSX alignment faults in little endian mode Anton Blanchard
2013-09-23 2:04 ` [PATCH 17/39] powerpc: Use generic checksum code in little endian Anton Blanchard
2013-09-23 2:04 ` [PATCH 18/39] powerpc: Use generic memcpy " Anton Blanchard
2013-09-23 2:04 ` [PATCH 19/39] powerpc: uname should return ppc64le/ppcle on little endian builds Anton Blanchard
2013-09-23 2:04 ` [PATCH 20/39] powerpc: Little endian fixes for platforms/powernv/opal.c Anton Blanchard
2013-09-23 2:04 ` [PATCH 21/39] powerpc: Little endian fix for arch/powerpc/platforms/powernv/pci.c Anton Blanchard
2013-09-23 2:04 ` [PATCH 22/39] powerpc: Little endian fix for arch/powerpc/platforms/powernv/pci-p5ioc2.c Anton Blanchard
2013-09-23 2:04 ` [PATCH 23/39] powerpc: Little endian sparse clean up for arch/powerpc/platforms/powernv/pci-ioda.c Anton Blanchard
2013-09-23 2:04 ` [PATCH 24/39] powerpc/powernv: Fix endian issues in OPAL RTC driver Anton Blanchard
2013-09-23 2:04 ` [PATCH 25/39] powerpc/powernv: Fix endian issues in OPAL ICS backend Anton Blanchard
2013-09-23 2:05 ` [PATCH 26/39] powerpc/powernv: Make OPAL NVRAM device tree accesses endian safe Anton Blanchard
2013-09-23 2:05 ` [PATCH 27/39] powerpc/powernv: Fix endian issues in powernv PCI code Anton Blanchard
2013-09-23 2:05 ` [PATCH 28/39] powerpc/powernv: Fix endian issues in OPAL console and udbg backend Anton Blanchard
2013-09-23 2:05 ` [PATCH 29/39] powerpc/powernv: Fix OPAL entry and exit in little endian mode Anton Blanchard
2013-09-23 2:05 ` [PATCH 30/39] powerpc/powernv: Don't register exception handlers " Anton Blanchard
2013-09-23 2:05 ` [PATCH 31/39] powerpc/powernv: More little endian issues in OPAL RTC driver Anton Blanchard
2013-09-23 2:05 ` [PATCH 32/39] powerpc/powernv: Fix some PCI sparse errors and one LE bug Anton Blanchard
2013-09-23 2:05 ` [PATCH 33/39] powerpc/hvsi: Fix endian issues in HVSI driver Anton Blanchard
2013-09-23 2:05 ` [PATCH 34/39] tty/hvc_opal: powerpc: Make OPAL HVC device tree accesses endian safe Anton Blanchard
2013-09-23 2:05 ` [PATCH 35/39] KVM: PPC: Disable KVM on little endian builds Anton Blanchard
2013-09-23 2:05 ` [PATCH 36/39] powerpc/kvm/book3s_hv: Add little endian guest support Anton Blanchard
2013-09-25 12:10 ` [PATCH] powerpc/kvmbook3s_hv: propagate H_SET_MODE to the host Laurent Dufour
2013-09-25 12:27 ` Greg Kurz
2013-09-25 22:31 ` Paul Mackerras
2013-09-27 8:14 ` Laurent Dufour
2013-09-27 13:59 ` [PATCH V2] powerpc/kvm/book3s_hv: propagate H_SET_MODE_RESOURCE_LE " Laurent Dufour
2013-09-27 14:45 ` Greg Kurz
2013-09-30 18:40 ` [PATCH 36/39] powerpc/kvm/book3s_hv: Add little endian guest support Alexander Graf
2013-09-23 2:05 ` [PATCH 37/39] powerpc: Add ability to build little endian kernels Anton Blanchard
2013-09-23 2:05 ` [PATCH 38/39] powerpc: Don't set HAVE_EFFICIENT_UNALIGNED_ACCESS on little endian builds Anton Blanchard
2013-09-23 2:05 ` [PATCH 39/39] powerpc: Work around little endian gcc bug Anton Blanchard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1379901913-5945-6-git-send-email-anton@samba.org \
--to=anton@samba.org \
--cc=benh@kernel.crashing.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).