linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: benh@au1.ibm.com
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>,
	linux-pci@vger.kernel.org, gwshan@linux.vnet.ibm.com,
	qiudayu@linux.vnet.ibm.com, bhelgaas@google.com,
	yan@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: [RFC PATCH V3 10/17] PCI: take additional IOV BAR alignment in sizing and assigning
Date: Tue, 10 Jun 2014 09:56:32 +0800	[thread overview]
Message-ID: <1402365399-5121-11-git-send-email-weiyang@linux.vnet.ibm.com> (raw)
In-Reply-To: <1402365399-5121-1-git-send-email-weiyang@linux.vnet.ibm.com>

At resource sizing/assigning stage, resources are divided into two lists,
requested list and additional list, while the alignement of the additional
IOV BAR is not taken into the sizeing and assigning procedure.

This is reasonable in the original implementation, since IOV BAR's alignment is
mostly the size of a PF BAR alignemt. This means the alignment is already taken
into consideration. While this rule may be violated on some platform.

This patch take the additional IOV BAR alignment in sizing and assigning stage
explicitly.

Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
---
 drivers/pci/setup-bus.c |   66 ++++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 59 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 9509ffa..0c3b3a5 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -120,6 +120,28 @@ static resource_size_t get_res_add_size(struct list_head *head,
 	return 0;
 }
 
+static resource_size_t get_res_add_align(struct list_head *head,
+		struct resource *res)
+{
+	struct pci_dev_resource *dev_res;
+
+	list_for_each_entry(dev_res, head, list) {
+		if (dev_res->res == res) {
+			int idx = res - &dev_res->dev->resource[0];
+
+			dev_printk(KERN_DEBUG, &dev_res->dev->dev,
+				   "res[%d]=%pR get_res_add_align min_align %llx\n",
+				   idx, dev_res->res,
+				   (unsigned long long)dev_res->min_align);
+
+			return dev_res->min_align;
+		}
+	}
+
+	return 0;
+}
+
+
 /* Sort resources by alignment */
 static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
 {
@@ -369,8 +391,9 @@ static void __assign_resources_sorted(struct list_head *head,
 	LIST_HEAD(save_head);
 	LIST_HEAD(local_fail_head);
 	struct pci_dev_resource *save_res;
-	struct pci_dev_resource *dev_res, *tmp_res;
+	struct pci_dev_resource *dev_res, *tmp_res, *dev_res2;
 	unsigned long fail_type;
+	resource_size_t add_align, align;
 
 	/* Check if optional add_size is there */
 	if (!realloc_head || list_empty(realloc_head))
@@ -385,10 +408,31 @@ static void __assign_resources_sorted(struct list_head *head,
 	}
 
 	/* Update res in head list with add_size in realloc_head list */
-	list_for_each_entry(dev_res, head, list)
+	list_for_each_entry_safe(dev_res, tmp_res, head, list) {
 		dev_res->res->end += get_res_add_size(realloc_head,
 							dev_res->res);
 
+		if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
+			continue;
+
+		add_align = get_res_add_align(realloc_head, dev_res->res);
+
+		if (add_align > dev_res->res->start) {
+			dev_res->res->start = add_align;
+			dev_res->res->end = add_align +
+				            resource_size(dev_res->res);
+
+			list_for_each_entry(dev_res2, head, list) {
+				align = pci_resource_alignment(dev_res2->dev,
+							       dev_res2->res);
+				if (add_align > align)
+					list_move_tail(&dev_res->list,
+						       &dev_res2->list);
+			}
+               }
+
+	}
+
 	/* Try updated head list with add_size added */
 	assign_requested_resources_sorted(head, &local_fail_head);
 
@@ -928,6 +972,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 					 mask | IORESOURCE_PREFETCH, type);
 	unsigned int mem64_mask = 0;
 	resource_size_t children_add_size = 0;
+	resource_size_t children_add_align = 0;
+	resource_size_t add_align = 0;
 
 	if (!b_res)
 		return 0;
@@ -955,6 +1001,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 			/* put SRIOV requested res to the optional list */
 			if (realloc_head && i >= PCI_IOV_RESOURCES &&
 					i <= PCI_IOV_RESOURCE_END) {
+				add_align = max(pci_resource_alignment(dev, r), add_align);
 				r->end = r->start - 1;
 				add_to_list(realloc_head, dev, r, r_size, 0/* don't care */);
 				children_add_size += r_size;
@@ -982,8 +1029,11 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 				max_order = order;
 			mem64_mask &= r->flags & IORESOURCE_MEM_64;
 
-			if (realloc_head)
+			if (realloc_head) {
 				children_add_size += get_res_add_size(realloc_head, r);
+				children_add_align = get_res_add_align(realloc_head, r);
+				add_align = max(add_align, children_add_align);
+			}
 		}
 	}
 
@@ -994,7 +1044,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 		add_size = children_add_size;
 	size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
 		calculate_memsize(size, min_size, add_size,
-				resource_size(b_res), min_align);
+				resource_size(b_res), max(min_align, add_align));
 	if (!size0 && !size1) {
 		if (b_res->start || b_res->end)
 			dev_info(&bus->self->dev, "disabling bridge window "
@@ -1007,10 +1057,12 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 	b_res->end = size0 + min_align - 1;
 	b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask;
 	if (size1 > size0 && realloc_head) {
-		add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align);
+		add_to_list(realloc_head, bus->self, b_res, size1-size0,
+				max(min_align, add_align));
 		dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
-				 "%pR to %pR add_size %llx\n", b_res,
-				 &bus->busn_res, (unsigned long long)size1-size0);
+				 "%pR to %pR add_size %llx add_align %llx\n", b_res,
+				 &bus->busn_res, (unsigned long long)size1-size0,
+				 max(min_align, add_align));
 	}
 	return 1;
 }
-- 
1.7.9.5

  parent reply	other threads:[~2014-06-10  1:57 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-10  1:56 [RFC PATCH V3 00/17] Enable SRIOV on POWER8 Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 01/17] pci/iov: Export interface for retrieve VF's BDF Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 02/17] pci/of: Match PCI VFs to dev-tree nodes dynamically Wei Yang
2014-06-23  5:07   ` Gavin Shan
2014-06-23  6:29     ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 03/17] ppc/pci: don't unset pci resources for VFs Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 04/17] PCI: SRIOV: add VF enable/disable hook Wei Yang
2014-06-23  5:03   ` Gavin Shan
2014-06-23  6:29     ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 05/17] ppc/pnv: user macro to define the TCE size Wei Yang
2014-06-23  5:12   ` Gavin Shan
2014-06-23  6:31     ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 06/17] ppc/pnv: allocate pe->iommu_table dynamically Wei Yang
2014-06-24 10:06   ` Alexey Kardashevskiy
2014-06-25  1:12     ` Wei Yang
2014-06-25  4:12       ` Alexey Kardashevskiy
2014-06-25  5:27         ` Wei Yang
2014-06-25  7:50           ` Alexey Kardashevskiy
2014-06-25  7:56             ` Benjamin Herrenschmidt
2014-06-25  9:18               ` Wei Yang
2014-06-25  9:13             ` Wei Yang
2014-06-25  9:20           ` David Laight
2014-06-25  9:31             ` Wei Yang
2014-06-25 10:30             ` Alexey Kardashevskiy
2014-07-14  3:12             ` Benjamin Herrenschmidt
2014-06-10  1:56 ` [RFC PATCH V3 07/17] ppc/pnv: Add function to deconfig a PE Wei Yang
2014-06-23  5:27   ` Gavin Shan
2014-06-23  9:07     ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 08/17] PCI: Add weak pcibios_sriov_resource_size() interface Wei Yang
2014-06-23  5:41   ` Gavin Shan
2014-06-23  7:56     ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 09/17] PCI: Add weak pcibios_sriov_resource_alignment() interface Wei Yang
2014-06-10  1:56 ` Wei Yang [this message]
2014-06-10  1:56 ` [RFC PATCH V3 11/17] ppc/pnv: Expand VF resources according to the number of total_pe Wei Yang
2014-06-23  6:07   ` Gavin Shan
2014-06-23  6:56     ` Wei Yang
2014-06-23  7:08       ` Gavin Shan
2014-06-10  1:56 ` [RFC PATCH V3 12/17] powerpc/powernv: implement pcibios_sriov_resource_alignment on powernv Wei Yang
2014-06-23  6:09   ` Gavin Shan
2014-06-23  8:21     ` Wei Yang
2014-06-23 23:29       ` Gavin Shan
2014-06-24  1:24         ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 13/17] powerpc/powernv: shift VF resource with an offset Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 14/17] ppc/pci: create/release dev-tree node for VFs Wei Yang
2014-06-18 18:26   ` Grant Likely
2014-06-18 20:51     ` Benjamin Herrenschmidt
2014-06-19  2:46     ` Wei Yang
2014-06-19  8:30       ` Grant Likely
2014-06-19  9:42         ` Wei Yang
2014-06-20  3:46         ` Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 15/17] powerpc/powernv: allocate VF PE Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 16/17] ppc/pci: Expanding IOV BAR, with m64_per_iov supported Wei Yang
2014-06-10  1:56 ` [RFC PATCH V3 17/17] ppc/pnv: Group VF PE when IOV BAR is big on PHB3 Wei Yang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1402365399-5121-11-git-send-email-weiyang@linux.vnet.ibm.com \
    --to=weiyang@linux.vnet.ibm.com \
    --cc=benh@au1.ibm.com \
    --cc=bhelgaas@google.com \
    --cc=gwshan@linux.vnet.ibm.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=qiudayu@linux.vnet.ibm.com \
    --cc=yan@linux.vnet.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).