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From: Zhao Qiang <qiang.zhao@nxp.com>
To: <oss@buserror.net>, <davem@davemloft.net>,
	<Joakim.Tjernlund@infinera.com>
Cc: <linuxppc-dev@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
	<netdev@vger.kernel.org>, <xiaobo.xie@nxp.com>,
	Zhao Qiang <qiang.zhao@nxp.com>
Subject: [Patch v3 3/5] fsl/qe: Make regs resouce_size_t
Date: Mon, 6 Jun 2016 14:30:00 +0800	[thread overview]
Message-ID: <1465194602-43209-3-git-send-email-qiang.zhao@nxp.com> (raw)
In-Reply-To: <1465194602-43209-1-git-send-email-qiang.zhao@nxp.com>

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
Changes for v2:
	- modify subject
Changes for v3:
	- na

 include/soc/fsl/qe/ucc_fast.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/soc/fsl/qe/ucc_fast.h b/include/soc/fsl/qe/ucc_fast.h
index b2633b7..e898895 100644
--- a/include/soc/fsl/qe/ucc_fast.h
+++ b/include/soc/fsl/qe/ucc_fast.h
@@ -123,7 +123,7 @@ struct ucc_fast_info {
 	enum qe_clock tx_clock;
 	enum qe_clock rx_sync;
 	enum qe_clock tx_sync;
-	u32 regs;
+	resource_size_t regs;
 	int irq;
 	u32 uccm_mask;
 	int bd_mem_part;
-- 
2.1.0.27.g96db324

  parent reply	other threads:[~2016-06-06  6:56 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-06  6:29 [Patch v3 1/5] fsl/qe: add rx_sync and tx_sync for TDM mode Zhao Qiang
2016-06-06  6:29 ` [Patch v3 2/5] fsl/qe: setup clock source " Zhao Qiang
2016-06-07 22:56   ` David Miller
2016-06-06  6:30 ` Zhao Qiang [this message]
2016-06-07 22:56   ` [Patch v3 3/5] fsl/qe: Make regs resouce_size_t David Miller
2016-06-06  6:30 ` [Patch v3 4/5] fsl/qe: Add QE TDM lib Zhao Qiang
2016-06-07 22:57   ` David Miller
2016-06-06  6:30 ` [Patch v3 5/5] drivers/net: support hdlc function for QE-UCC Zhao Qiang
2016-06-07 22:57   ` David Miller
2016-06-07 22:56 ` [Patch v3 1/5] fsl/qe: add rx_sync and tx_sync for TDM mode David Miller

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