From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: linuxppc-dev@ozlabs.org
Subject: [RFC PATCH 01/10] powerpc: Move ARCH_DLINFO out of uapi
Date: Wed, 17 Aug 2016 15:39:08 +1000 [thread overview]
Message-ID: <1471412357-3477-1-git-send-email-benh@kernel.crashing.org> (raw)
It's an kernel private macro, it doesn't belong there
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/elf.h | 22 ++++++++++++++++++++++
arch/powerpc/include/uapi/asm/elf.h | 23 -----------------------
2 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index ee46ffe..730c27e 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -136,4 +136,26 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
#endif /* CONFIG_SPU_BASE */
+/*
+ * The requirements here are:
+ * - keep the final alignment of sp (sp & 0xf)
+ * - make sure the 32-bit value at the first 16 byte aligned position of
+ * AUXV is greater than 16 for glibc compatibility.
+ * AT_IGNOREPPC is used for that.
+ * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
+ * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
+ * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
+ */
+#define ARCH_DLINFO \
+do { \
+ /* Handle glibc compatibility. */ \
+ NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
+ NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
+ /* Cache size items */ \
+ NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
+ NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
+ NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
+ VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \
+} while (0)
+
#endif /* _ASM_POWERPC_ELF_H */
diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
index 3a9e44c..b2c6fdd 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -162,29 +162,6 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
#endif
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- * AUXV is greater than 16 for glibc compatibility.
- * AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
- */
-#define ARCH_DLINFO \
-do { \
- /* Handle glibc compatibility. */ \
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
- /* Cache size items */ \
- NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
- NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
- NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
- VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \
-} while (0)
-
/* PowerPC64 relocations defined by the ABIs */
#define R_PPC64_NONE R_PPC_NONE
#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
--
2.7.4
next reply other threads:[~2016-08-17 5:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-17 5:39 Benjamin Herrenschmidt [this message]
2016-08-17 5:39 ` [RFC PATCH 02/10] powerpc: Move {d, i, u}cache_bsize definitions to a common place Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 03/10] powerpc: A new cache shape aux vectors Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 04/10] powerpc: Remove obsolete comment about patching instructions Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 05/10] powerpc/64: Fix naming of cache block vs. cache line Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 06/10] powerpc/64: Retrieve number of L1 cache sets from device-tree Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 07/10] powerpc/64: Build L1 cache shape info for userspace Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 08/10] powerpc/64: Clean up ppc64_caches using a struct per cache Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 09/10] powerpc/64: Add L2 and L3 cache shape info Benjamin Herrenschmidt
2016-08-17 5:39 ` [RFC PATCH 10/10] powerpc/64: Hard code cache geometry on POWER8 Benjamin Herrenschmidt
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