From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E2F2CA9EAC for ; Sat, 19 Oct 2019 05:58:15 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1BEED222C2 for ; Sat, 19 Oct 2019 05:58:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1BEED222C2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.vnet.ibm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46wByr6p6MzDqBl for ; Sat, 19 Oct 2019 16:58:12 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=haren@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46wBtM3tQ7zDqS1 for ; Sat, 19 Oct 2019 16:54:19 +1100 (AEDT) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x9J5HjMr151942; Sat, 19 Oct 2019 01:54:14 -0400 Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0b-001b2d01.pphosted.com with ESMTP id 2vqv3t0qjg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 19 Oct 2019 01:54:13 -0400 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x9J5JPla024613; Sat, 19 Oct 2019 05:54:12 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma01dal.us.ibm.com with ESMTP id 2vqt45h5sf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 19 Oct 2019 05:54:12 +0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x9J5sCUj39780858 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 19 Oct 2019 05:54:12 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 05871112062; Sat, 19 Oct 2019 05:54:12 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8C887112061; Sat, 19 Oct 2019 05:54:11 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Sat, 19 Oct 2019 05:54:11 +0000 (GMT) Subject: [RFC PATCH 03/13] powerpc/vas: Setup IRQ mapping and register port for each window From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au Content-Type: text/plain; charset="UTF-8" Date: Fri, 18 Oct 2019 22:53:56 -0700 Message-ID: <1571464436.24387.28.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-19_01:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910190051 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Read interrupt and port values from the device tree, setup IRQ mapping and register IRQ for each VAS instance. Set port value for each NX window. When NX sees a fault on CRB, kernel gets an interrupt and handles the fault. IRQ setup and fault handling is needed only for user space send windows. So for kernel requests, ignore if interrupts property is not available. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- .../devicetree/bindings/powerpc/ibm,vas.txt | 5 ++ arch/powerpc/platforms/powernv/vas-window.c | 12 ++++ arch/powerpc/platforms/powernv/vas.c | 66 ++++++++++++++++++++-- arch/powerpc/platforms/powernv/vas.h | 2 + 4 files changed, 80 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt index bf11d2f..12de08b 100644 --- a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt +++ b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt @@ -11,6 +11,8 @@ Required properties: window context start and length, OS/User window context start and length, "Paste address" start and length, "Paste window id" start bit and number of bits) +- ibm,vas-port : Port address for the interrupt. +- interrupts: IRQ value for each VAS instance and level. Example: @@ -18,5 +20,8 @@ Example: compatible = "ibm,vas", "ibm,power9-vas"; reg = <0x6019100000000 0x2000000 0x6019000000000 0x100000000 0x8000000000000 0x100000000 0x20 0x10>; name = "vas"; + interrupts = <0x1f 0>; + interrupt-parent = <&mpic>; ibm,vas-id = <0x1>; + ibm,vas-port = <0x6010001000000>; }; diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index ea5ca02..3bd403b 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -758,6 +758,7 @@ static void init_winctx_for_rxwin(struct vas_window *rxwin, winctx->min_scope = VAS_SCOPE_LOCAL; winctx->max_scope = VAS_SCOPE_VECTORED_GROUP; + winctx->irq_port = rxwin->vinst->irq_port; } static bool rx_win_args_valid(enum vas_cop_type cop, @@ -959,6 +960,7 @@ static void init_winctx_for_txwin(struct vas_window *txwin, winctx->tc_mode = txattr->tc_mode; winctx->min_scope = VAS_SCOPE_LOCAL; winctx->max_scope = VAS_SCOPE_VECTORED_GROUP; + winctx->irq_port = txwin->vinst->irq_port; winctx->pswid = 0; } @@ -1050,6 +1052,16 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, } } else { /* + * Interrupt hanlder setup failed. Means NX can not generate + * fault for page fault. So not opening for user space tx + * window. + */ + if (!vinst->virq) { + rc = -ENODEV; + goto free_window; + } + + /* * A user mapping must ensure that context switch issues * CP_ABORT for this thread. */ diff --git a/arch/powerpc/platforms/powernv/vas.c b/arch/powerpc/platforms/powernv/vas.c index ed9cc6d..e6f5e27 100644 --- a/arch/powerpc/platforms/powernv/vas.c +++ b/arch/powerpc/platforms/powernv/vas.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include #include "vas.h" @@ -23,9 +25,32 @@ static DEFINE_PER_CPU(int, cpu_vas_id); +static irqreturn_t vas_irq_handler(int virq, void *data) +{ + struct vas_instance *vinst = data; + + pr_devel("VAS %d: virq %d\n", vinst->vas_id, virq); + + return IRQ_HANDLED; +} + +static void vas_irq_fault_handle_setup(struct vas_instance *vinst) +{ + int rc; + char devname[64]; + + snprintf(devname, sizeof(devname), "vas-inst-%d", vinst->vas_id); + rc = request_irq(vinst->virq, vas_irq_handler, 0, devname, vinst); + if (rc) { + pr_err("VAS[%d]: Request IRQ(%d) failed with %d\n", + vinst->vas_id, vinst->virq, rc); + } +} + static int init_vas_instance(struct platform_device *pdev) { - int rc, cpu, vasid; + int rc, cpu, vasid, nresources = 5; + uint64_t port; struct resource *res; struct vas_instance *vinst; struct device_node *dn = pdev->dev.of_node; @@ -36,7 +61,18 @@ static int init_vas_instance(struct platform_device *pdev) return -ENODEV; } - if (pdev->num_resources != 4) { + rc = of_property_read_u64(dn, "ibm,vas-port", &port); + if (rc) { + pr_err("No ibm,vas-port property for %s?\n", pdev->name); + /* No interrupts property */ + nresources = 4; + } + + /* + * interrupts property is availale with 'ibm,vas-port' property. + * 4 Resources and 1 IRQ if interrupts property is available. + */ + if (pdev->num_resources != nresources) { pr_err("Unexpected DT configuration for [%s, %d]\n", pdev->name, vasid); return -ENODEV; @@ -51,6 +87,7 @@ static int init_vas_instance(struct platform_device *pdev) mutex_init(&vinst->mutex); vinst->vas_id = vasid; vinst->pdev = pdev; + vinst->irq_port = port; res = &pdev->resource[0]; vinst->hvwc_bar_start = res->start; @@ -66,12 +103,24 @@ static int init_vas_instance(struct platform_device *pdev) pr_err("Bad 'paste_win_id_shift' in DT, %llx\n", res->end); goto free_vinst; } - vinst->paste_win_id_shift = 63 - res->end; + /* interrupts property */ + if (pdev->num_resources == 5) { + res = &pdev->resource[4]; + vinst->virq = res->start; + if (vinst->virq <= 0) { + pr_err("IRQ resource is not available for [%s, %d]\n", + pdev->name, vasid); + vinst->virq = 0; + } + } + pr_devel("Initialized instance [%s, %d], paste_base 0x%llx, " - "paste_win_id_shift 0x%llx\n", pdev->name, vasid, - vinst->paste_base_addr, vinst->paste_win_id_shift); + "paste_win_id_shift 0x%llx IRQ %d Port 0x%llx\n", + pdev->name, vasid, vinst->paste_base_addr, + vinst->paste_win_id_shift, vinst->virq, + vinst->irq_port); for_each_possible_cpu(cpu) { if (cpu_to_chip_id(cpu) == of_get_ibm_chip_id(dn)) @@ -82,6 +131,13 @@ static int init_vas_instance(struct platform_device *pdev) list_add(&vinst->node, &vas_instances); mutex_unlock(&vas_mutex); + /* + * IRQ and fault handling setup is needed only for user space + * send windows. + */ + if (vinst->virq) + vas_irq_fault_handle_setup(vinst); + vas_instance_init_dbgdir(vinst); dev_set_drvdata(&pdev->dev, vinst); diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index 9cc5251..bf7d3db 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -313,6 +313,8 @@ struct vas_instance { u64 paste_base_addr; u64 paste_win_id_shift; + u64 irq_port; + int virq; struct mutex mutex; struct vas_window *rxwin[VAS_COP_TYPE_MAX]; struct vas_window *windows[VAS_WINDOWS_PER_CHIP]; -- 1.8.3.1