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Tue, 24 Mar 2020 21:06:35 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 02OL6YbN32047558 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 24 Mar 2020 21:06:34 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A49AEAE064; Tue, 24 Mar 2020 21:06:34 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BB369AE062; Tue, 24 Mar 2020 21:06:33 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Tue, 24 Mar 2020 21:06:33 +0000 (GMT) Subject: Re: [PATCH v8 04/14] powerpc/vas: Alloc and setup IRQ and trigger port address From: Haren Myneni To: =?ISO-8859-1?Q?C=E9dric?= Le Goater In-Reply-To: <7793f6d4-770b-5fd0-f177-651130c0ff53@kaod.org> References: <1584598120.9256.15237.camel@hbabu-laptop> <1584598473.9256.15248.camel@hbabu-laptop> <7793f6d4-770b-5fd0-f177-651130c0ff53@kaod.org> Content-Type: text/plain; charset="UTF-8" Date: Tue, 24 Mar 2020 14:06:01 -0700 Message-ID: <1585083961.10664.1.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645 definitions=2020-03-24_07:2020-03-23, 2020-03-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 suspectscore=0 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2003240105 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mikey@neuling.org, Frederic Bonnard , herbert@gondor.apana.org.au, npiggin@gmail.com, hch@infradead.org, oohall@gmail.com, sukadev@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, ajd@linux.ibm.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, 2020-03-24 at 15:48 +0100, Cédric Le Goater wrote: > On 3/19/20 7:14 AM, Haren Myneni wrote: > > > > Alloc IRQ and get trigger port address for each VAS instance. Kernel > > register this IRQ per VAS instance and sets this port for each send > > window. NX interrupts the kernel when it sees page fault. > > > > Signed-off-by: Haren Myneni > > --- > > arch/powerpc/platforms/powernv/vas.c | 34 ++++++++++++++++++++++++++++------ > > arch/powerpc/platforms/powernv/vas.h | 2 ++ > > 2 files changed, 30 insertions(+), 6 deletions(-) > > > > diff --git a/arch/powerpc/platforms/powernv/vas.c b/arch/powerpc/platforms/powernv/vas.c > > index ed9cc6d..168ab68 100644 > > --- a/arch/powerpc/platforms/powernv/vas.c > > +++ b/arch/powerpc/platforms/powernv/vas.c > > @@ -15,6 +15,7 @@ > > #include > > #include > > #include > > +#include > > > > #include "vas.h" > > > > @@ -25,10 +26,12 @@ > > > > static int init_vas_instance(struct platform_device *pdev) > > { > > - int rc, cpu, vasid; > > - struct resource *res; > > - struct vas_instance *vinst; > > struct device_node *dn = pdev->dev.of_node; > > + struct vas_instance *vinst; > > + uint32_t chipid, irq; > > + struct resource *res; > > + int rc, cpu, vasid; > > + uint64_t port; > > > > rc = of_property_read_u32(dn, "ibm,vas-id", &vasid); > > if (rc) { > > @@ -36,6 +39,12 @@ static int init_vas_instance(struct platform_device *pdev) > > return -ENODEV; > > } > > > > + rc = of_property_read_u32(dn, "ibm,chip-id", &chipid); > > + if (rc) { > > + pr_err("No ibm,chip-id property for %s?\n", pdev->name); > > + return -ENODEV; > > + } > > + > > if (pdev->num_resources != 4) { > > pr_err("Unexpected DT configuration for [%s, %d]\n", > > pdev->name, vasid); > > @@ -69,9 +78,22 @@ static int init_vas_instance(struct platform_device *pdev) > > > > vinst->paste_win_id_shift = 63 - res->end; > > > > - pr_devel("Initialized instance [%s, %d], paste_base 0x%llx, " > > - "paste_win_id_shift 0x%llx\n", pdev->name, vasid, > > - vinst->paste_base_addr, vinst->paste_win_id_shift); > > + rc = xive_native_alloc_get_irq_info(chipid, &irq, &port); > > + if (rc) > > + return rc; > > + > > + vinst->virq = irq_create_mapping(NULL, irq); > > + if (!vinst->virq) { > > + pr_err("Inst%d: Unable to map global irq %d\n", > > + vinst->vas_id, irq); > > + return -EINVAL; > > + } > > + > > + vinst->irq_port = port; > > > I would prefer something like this : > > hwirq = xive_native_alloc_irq_on_chip(chip_id); > > vinst->virq = irq_create_mapping(NULL, hwirq); > if (!vinst->virq) { > ... > } > > { > struct irq_data *d = irq_get_irq_data(vinst->virq); > struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); > > vinst->irq_port = xd->trig_page; > } > > > and dump xive_native_alloc_get_irq_info(). Thanks Cedric, I will remove patch which adds this function. > > C. >