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Thu, 8 Oct 2020 10:52:14 +0000 (GMT) From: Athira Rajeev To: mpe@ellerman.id.au Subject: [PATCH 2/4] powerpc/perf: Using SIER[CMPL] instead of SIER[SIAR_VALID] Date: Thu, 8 Oct 2020 06:52:07 -0400 Message-Id: <1602154329-2092-3-git-send-email-atrajeev@linux.vnet.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1602154329-2092-1-git-send-email-atrajeev@linux.vnet.ibm.com> References: <1602154329-2092-1-git-send-email-atrajeev@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-08_04:2020-10-08, 2020-10-08 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 spamscore=0 phishscore=0 mlxlogscore=883 mlxscore=0 bulkscore=0 adultscore=0 clxscore=1015 suspectscore=1 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010080077 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mikey@neuling.org, maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Archived-At: List-Archive: On power10 DD1, there is an issue that causes the SIAR_VALID bit of Sampled Instruction Event Register(SIER) not to be set. But the SIAR_VALID bit is used for fetching the instruction address from Sampled Instruction Address Register(SIAR), and marked events are sampled only if the SIAR_VALID bit is set. So add a condition check for power10 DD1 to use SIER[CMPL] bit instead. Signed-off-by: Athira Rajeev --- arch/powerpc/perf/core-book3s.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index 08643cb..d766090 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -350,7 +350,14 @@ static inline int siar_valid(struct pt_regs *regs) int marked = mmcra & MMCRA_SAMPLE_ENABLE; if (marked) { - if (ppmu->flags & PPMU_HAS_SIER) + /* + * SIER[SIAR_VALID] is not set for some + * marked events on power10 DD1, so use + * SIER[CMPL] instead. + */ + if (ppmu->flags & PPMU_P10_DD1) + return regs->dar & 0x1; + else if (ppmu->flags & PPMU_HAS_SIER) return regs->dar & SIER_SIAR_VALID; if (ppmu->flags & PPMU_SIAR_VALID) -- 1.8.3.1