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Sat, 16 Jan 2021 02:34:15 -0800 (PST) Received: from localhost ([124.170.13.62]) by smtp.gmail.com with ESMTPSA id w2sm10751413pfj.110.2021.01.16.02.34.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Jan 2021 02:34:14 -0800 (PST) Date: Sat, 16 Jan 2021 20:34:09 +1000 From: Nicholas Piggin Subject: Re: [PATCH v6 17/39] powerpc/fsl_booke/32: CacheLockingException remove args To: Christophe Leroy , linuxppc-dev@lists.ozlabs.org References: <20210115165012.1260253-1-npiggin@gmail.com> <20210115165012.1260253-18-npiggin@gmail.com> <1bd92a69-71ab-cc7f-fec5-e2a67830c81b@csgroup.eu> <1610757796.o87kxvdq5e.astroid@bobo.none> <0d953b03-b908-0fd6-61bf-d0e461312874@csgroup.eu> In-Reply-To: <0d953b03-b908-0fd6-61bf-d0e461312874@csgroup.eu> MIME-Version: 1.0 Message-Id: <1610793173.p0wt85cufb.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Christophe Leroy's message of January 16, 2021 5:38 pm: >=20 >=20 > Le 16/01/2021 =C3=A0 01:43, Nicholas Piggin a =C3=A9crit=C2=A0: >> Excerpts from Christophe Leroy's message of January 16, 2021 3:14 am: >>> >>> >>> Le 15/01/2021 =C3=A0 17:49, Nicholas Piggin a =C3=A9crit=C2=A0: >>>> Like other interrupt handler conversions, switch to getting registers >>>> from the pt_regs argument. >>>> >>>> Signed-off-by: Nicholas Piggin >>>> --- >>>> arch/powerpc/kernel/head_fsl_booke.S | 6 +++--- >>>> arch/powerpc/kernel/traps.c | 5 +++-- >>>> 2 files changed, 6 insertions(+), 5 deletions(-) >>>> >>>> diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kerne= l/head_fsl_booke.S >>>> index fdd4d274c245..0d4d9a6fcca1 100644 >>>> --- a/arch/powerpc/kernel/head_fsl_booke.S >>>> +++ b/arch/powerpc/kernel/head_fsl_booke.S >>>> @@ -364,12 +364,12 @@ interrupt_base: >>>> /* Data Storage Interrupt */ >>>> START_EXCEPTION(DataStorage) >>>> NORMAL_EXCEPTION_PROLOG(DATA_STORAGE) >>>> - mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ >>>> + mfspr r5,SPRN_ESR /* Grab the ESR, save it3 */ >>>> stw r5,_ESR(r11) >>>> - mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ >>>> + mfspr r4,SPRN_DEAR /* Grab the DEAR, save it */ >>>> + stw r4, _DEAR(r11) >>>> andis. r10,r5,(ESR_ILK|ESR_DLK)@h >>>> bne 1f >>>> - stw r4, _DEAR(r11) >>>> EXC_XFER_LITE(0x0300, handle_page_fault) >>>> 1: >>>> addi r3,r1,STACK_FRAME_OVERHEAD >>> >>> Why isn't the above done in patch 5 ? >>=20 >> I don't think it's required there, is it? >=20 > Ah yes, moving the 'stw' is needed only here. >=20 > But the comments changes belong to patch 5, you have done exactly similar= changes there in=20 > kernel/head_40x.S >=20 > By the way, I think patch 17 could immediately follow patch 5 and patch 1= 8 could follow patch 6. I can probably do all these. I'll wait a couple of days and check if=20 Michael will merge the series before sending an update for small changes. Thanks, Nick