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[60.242.147.73]) by smtp.gmail.com with ESMTPSA id m2sm9225821pjf.24.2021.06.18.19.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Jun 2021 19:58:54 -0700 (PDT) Date: Sat, 19 Jun 2021 12:58:48 +1000 From: Nicholas Piggin Subject: Re: [PATCH v2 5/9] powerpc/microwatt: Use standard 16550 UART for console To: Paul Mackerras References: <1624001539.de8wj3qkjv.astroid@bobo.none> In-Reply-To: MIME-Version: 1.0 Message-Id: <1624071299.ppzoru83yx.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Paul Mackerras's message of June 18, 2021 10:12 pm: > On Fri, Jun 18, 2021 at 05:40:40PM +1000, Nicholas Piggin wrote: >> Excerpts from Paul Mackerras's message of June 18, 2021 1:46 pm: >> > From: Benjamin Herrenschmidt >> >=20 >> > This adds support to the Microwatt platform to use the standard >> > 16550-style UART which available in the standalone Microwatt FPGA. >> >=20 >> > Signed-off-by: Benjamin Herrenschmidt >> > Signed-off-by: Paul Mackerras > ... >> > +#ifdef CONFIG_PPC_EARLY_DEBUG_MICROWATT >> > + >> > +#define UDBG_UART_MW_ADDR ((void __iomem *)0xc0002000) >> > + >> > +static u8 udbg_uart_in_isa300_rm(unsigned int reg) >> > +{ >> > + uint64_t msr =3D mfmsr(); >> > + uint8_t c; >> > + >> > + mtmsr(msr & ~(MSR_EE|MSR_DR)); >> > + isync(); >> > + eieio(); >> > + c =3D __raw_rm_readb(UDBG_UART_MW_ADDR + (reg << 2)); >> > + mtmsr(msr); >> > + isync(); >> > + return c; >> > +} >>=20 >> Why is realmode required? No cache inhibited mappings yet? >=20 > Because it's EARLY debug, for use in the very early stages of boot > when the kernel's radix tree may or may not have been initialized. > The easiest way to make a function that works correctly whether or not > the radix tree has been initialized and the MMU turned on is to > temporarily turn off the MMU for data accesses and use lbzcix/stbcix Ah makes sense. > (which Microwatt has, even though it doesn't implement hypervisor > mode). >=20 > (I don't know which "yet" you meant - "yet" in the process of booting a > kernel, or "yet" in the process of Microwatt's development? Microwatt > certainly does have cache-inhibited mappings and has done since the > MMU was first introduced.) I did mean mappings to the UART, but good to get both answers :D >=20 > In fact the defconfig I add later in the series doesn't enable > CONFIG_PPC_EARLY_DEBUG_MICROWATT, but it's there if it's needed for > debugging. >=20 >> mtmsrd with L=3D0 is defined to be context synchronizing in isa 3, so I=20 >> don't think the isync would be required. There is a bit of code around=20 >> arch/powerpc that does this, maybe it used to be needed or some other >> implementations needed it? >>=20 >> That's just for my curiosity, it doesn't really hurt to have them >> there. >=20 > Right, and in fact mtmsrd is marked as a single-issue instruction in > Microwatt, so it should work with no isyncs or eieios. Presumably Ben > copied the isync/eieio pattern from somewhere else. Makes sense. Well I don't have any objection to the series. Thanks, Nick