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[220.244.87.52]) by smtp.gmail.com with ESMTPSA id s63sm15836688pfb.195.2021.07.01.01.04.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jul 2021 01:04:39 -0700 (PDT) Date: Thu, 01 Jul 2021 18:04:34 +1000 From: Nicholas Piggin Subject: Re: [RFC PATCH 38/43] KVM: PPC: Book3S HV P9: Test dawr_enabled() before saving host DAWR SPRs To: Fabiano Rosas , kvm-ppc@vger.kernel.org References: <20210622105736.633352-1-npiggin@gmail.com> <20210622105736.633352-39-npiggin@gmail.com> <87eecj2qcv.fsf@linux.ibm.com> In-Reply-To: <87eecj2qcv.fsf@linux.ibm.com> MIME-Version: 1.0 Message-Id: <1625126603.992wxhpa1l.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Fabiano Rosas's message of July 1, 2021 3:51 am: > Nicholas Piggin writes: >=20 >> Some of the DAWR SPR access is already predicated on dawr_enabled(), >> apply this to the remainder of the accesses. >> >> Signed-off-by: Nicholas Piggin >> --- >> arch/powerpc/kvm/book3s_hv_p9_entry.c | 34 ++++++++++++++++----------- >> 1 file changed, 20 insertions(+), 14 deletions(-) >> >> diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/bo= ok3s_hv_p9_entry.c >> index 7aa72efcac6c..f305d1d6445c 100644 >> --- a/arch/powerpc/kvm/book3s_hv_p9_entry.c >> +++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c >> @@ -638,13 +638,16 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64= time_limit, unsigned long lpc >> >> host_hfscr =3D mfspr(SPRN_HFSCR); >> host_ciabr =3D mfspr(SPRN_CIABR); >> - host_dawr0 =3D mfspr(SPRN_DAWR0); >> - host_dawrx0 =3D mfspr(SPRN_DAWRX0); >> host_psscr =3D mfspr(SPRN_PSSCR); >> host_pidr =3D mfspr(SPRN_PID); >> - if (cpu_has_feature(CPU_FTR_DAWR1)) { >> - host_dawr1 =3D mfspr(SPRN_DAWR1); >> - host_dawrx1 =3D mfspr(SPRN_DAWRX1); >> + >> + if (dawr_enabled()) { >> + host_dawr0 =3D mfspr(SPRN_DAWR0); >> + host_dawrx0 =3D mfspr(SPRN_DAWRX0); >> + if (cpu_has_feature(CPU_FTR_DAWR1)) { >> + host_dawr1 =3D mfspr(SPRN_DAWR1); >> + host_dawrx1 =3D mfspr(SPRN_DAWRX1); >=20 > The userspace needs to enable DAWR1 via KVM_CAP_PPC_DAWR1. That cap is > not even implemented in QEMU currently, so we never allow the guest to > set vcpu->arch.dawr1. If we check for kvm->arch.dawr1_enabled instead of > the CPU feature, we could shave some more time here. Ah good point, yes let's do that. Thanks, Nick