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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Peter Zijlstra <peterz@infradead.org>,
	kan.liang@linux.intel.com, mingo@kernel.org, acme@kernel.org,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	jolsa@redhat.com, eranian@google.com
Cc: linux-arch@vger.kernel.org, ak@linux.intel.com,
	catalin.marinas@arm.com, linuxppc-dev@lists.ozlabs.org,
	willy@infradead.org, linux-kernel@vger.kernel.org,
	dave.hansen@intel.com, npiggin@gmail.com,
	aneesh.kumar@linux.ibm.com, sparclinux@vger.kernel.org,
	will@kernel.org, davem@davemloft.net,
	kirill.shutemov@linux.intel.com
Subject: Re: [PATCH 0/5] perf/mm: Fix PERF_SAMPLE_*_PAGE_SIZE
Date: Fri, 13 Nov 2020 14:44:37 +0100	[thread overview]
Message-ID: <16ad8cab-08e2-27a7-6803-baadc6b8721b@csgroup.eu> (raw)
In-Reply-To: <20201113111901.743573013@infradead.org>

Hi

Le 13/11/2020 à 12:19, Peter Zijlstra a écrit :
> Hi,
> 
> These patches provide generic infrastructure to determine TLB page size from
> page table entries alone. Perf will use this (for either data or code address)
> to aid in profiling TLB issues.
> 
> While most architectures only have page table aligned large pages, some
> (notably ARM64, Sparc64 and Power) provide non page table aligned large pages
> and need to provide their own implementation of these functions.
> 
> I've provided (completely untested) implementations for ARM64 and Sparc64, but
> failed to penetrate the _many_ Power MMUs. I'm hoping Nick or Aneesh can help
> me out there.
> 

I can help with powerpc 8xx. It is a 32 bits powerpc. The PGD has 1024 entries, that means each 
entry maps 4M.

Page sizes are 4k, 16k, 512k and 8M.

For the 8M pages we use hugepd with a single entry. The two related PGD entries point to the same 
hugepd.

For the other sizes, they are in standard page tables. 16k pages appear 4 times in the page table. 
512k entries appear 128 times in the page table.

When the PGD entry has _PMD_PAGE_8M bits, the PMD entry points to a hugepd with holds the single 8M 
entry.

In the PTE, we have two bits: _PAGE_SPS and _PAGE_HUGE

_PAGE_HUGE means it is a 512k page
_PAGE_SPS means it is not a 4k page

The kernel can by build either with 4k pages as standard page size, or 16k pages. It doesn't change 
the page table layout though.

Hope this is clear. Now I don't really know to wire that up to your series.

Christophe

  parent reply	other threads:[~2020-11-13 13:49 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-13 11:19 [PATCH 0/5] perf/mm: Fix PERF_SAMPLE_*_PAGE_SIZE Peter Zijlstra
2020-11-13 11:19 ` [PATCH 1/5] mm/gup: Provide gup_get_pte() more generic Peter Zijlstra
2020-11-13 11:19 ` [PATCH 2/5] mm: Introduce pXX_leaf_size() Peter Zijlstra
2020-11-13 11:45   ` Peter Zijlstra
2020-11-13 11:19 ` [PATCH 3/5] perf/core: Fix arch_perf_get_page_size() Peter Zijlstra
2020-11-16 13:11   ` Liang, Kan
2020-11-13 11:19 ` [PATCH 4/5] arm64/mm: Implement pXX_leaf_size() support Peter Zijlstra
2020-11-13 11:19 ` [PATCH 5/5] sparc64/mm: " Peter Zijlstra
2020-11-13 13:44 ` Christophe Leroy [this message]
2020-11-20 11:18   ` [PATCH 0/5] perf/mm: Fix PERF_SAMPLE_*_PAGE_SIZE Christophe Leroy
2020-11-20 12:20     ` Peter Zijlstra
2020-11-26 10:46       ` Peter Zijlstra
2020-11-16 15:43 ` Kirill A. Shutemov
2020-11-16 15:54   ` Matthew Wilcox
2020-11-16 16:28     ` Dave Hansen
2020-11-16 16:32       ` Matthew Wilcox
2020-11-16 16:36         ` Dave Hansen
2020-11-16 16:57           ` Peter Zijlstra
2020-11-16 16:55       ` Peter Zijlstra

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